logic flow 中文意思是什麼

logic flow 解釋
邏輯流程
  • logic : n. 1. 邏輯,理論學。2. 推理[方法];邏輯性,條理性。3. 威力,壓力,強制(力)。
  • flow : vi 1 流,流動。2 (血液等)流通,循環。3 流過;川流不息;(時間)飛逝;(言語等)流暢。4 (衣服、...
  1. We split the whole trade into the atom that can be used repeatedly. every atom can finish an independent function. this system could organize atoms to finish the service logic which trade need through some methods of flow control

    於是,就引入原子交易的概念,即將整個交易拆成可復用的原子,每個原子完成一項獨立的功能,可以通過某種流程式控制制辦法,組織原子完成所需交易的業務邏輯。
  2. In addition, make out in detail the design on inner combination logic and time logic of fpga, including series - parallel conversion, data selector, counter, flip - latch, timer, encoder, etc. at one time, not only pursuit flow of the data gathering system is illuminated, but also make use of in reason and effectively inner ram resource of fpga and build it in ping - pong framework

    另外,詳細的介紹了fpga內部的組合邏輯和時序邏輯的設計方案,包括串並轉換、數據選擇器、計數器、鎖存器、定時器、譯碼器等。並闡述了數據採集系統的工作流程,而且合理有效地使用了fpga內部的ram資源,將其構建成乒乓式結構。
  3. The key to the fft algorithm is the design of butterfly computation and that of the address logic. the whole schema is designed in the top - down design flow and described in the vhsic hardware description language ( vhdl ), basing on these, we do our research on reconfigurable technology. the result indicates that the data processing ability of reconfigurable system improved greatly

    結果表明,可重構系統在數據處理能力方面比以往的系統有了很大的提高,本設計實現的fft重構處理器可工作於60mhz下,完成一個16點fft需要132個主時鐘周期,完成32點fft需要324個主時鐘周期,而且具有一定可重構性,可以方便地將其運算點數進行擴展,或將其他的圖像處理演算法在實時處理系統中實現。
  4. The java disassembler is a very handy tool for understanding the logic flow and method names for writing detectors

    對于理解編寫檢測器的邏輯流程和方法名, java反匯編程序是非常有用的工具。
  5. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端狀態機設計和低層驅動程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規模可編程器件的數字系統設計方法,針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。
  6. Considering the above preconditions, aiming at tobacco daily business and requirements of data, this article presents the following : 1. to analyze business logic and data info a flow chart, based on software including ibm aix os, db2 udb according to the tobacco number one ’ s total design thoughtfulness 2. to analyze the factors affecting db2 database performance in detail in allusion to the characteristic of tobacco industry including large data, lots of users, data updating rapidly, and frequent visits ; 3

    基於以上前提,本文針對煙草企業日常業務和數據量的需求作了以下工作:從國家煙草專賣局煙草一號工程總體設計思路出發,分析工業企業的業務邏輯以及數據信息流圖,涉及的相關平臺,包括ibmaix操作系統、 db2udb通用數據庫系統。針對煙草行業數據量、用戶量龐大,數據更新迅速、用戶訪問頻繁的特點,詳細分析了影響db2數據庫性能的因素。
  7. In this article, i suggested a new design method of regular logic cells and the micro - instruction rom basing on the cadence environment, also i put forward a novel post - layout simulation flow base on the eda tool - - powermill

    在本文中,筆者提出了在cadence平臺的利用編程實現規則邏輯版圖以及微碼rom碼點的設計方法和基於powermill工具的后模擬版圖驗證流程。
  8. Manufacturers of flow meters, electronic instruments and logic controllers with networking

    -生物化學與分子生物學檢驗分析儀器的專業生產企業。
  9. This design for mvbc system adopts top - down eda common design flow. circuit design adopts veriloghdl coding description. function simulation and timing verification adopt simulation tool vcs of synopsys inc, the logic synthesis tool and fpga programming tool adopt the quartus ii of altera inc, and the fpga advice stratix ii ep2s15

    該mvbc系統設計採用業界通用的自上而下的eda設計方法,電路邏輯實現採用veriloghdl硬體語言描述,功能和時序驗證的動態模擬採用synopsys公司的vcs ,而邏輯綜合與fpga實現採用altera公司的集成開發環境quartusii軟體以及stratixiiep2s15的fpga器件。
  10. This paper focuses on the combitional logic synthesis including two level logic synthesis and multiple level synthesis. and it is a part of control flow synthesis in a controller synthesis system. in this paper following problems are proposed and implemented : ( 1 ) implement the algorithm " espresso ", and make it suit to the system

    本文所完成的組合邏輯綜合的研究與實現是控制流綜合系統的一個組成部分,其中包括: ( 1 )引入並實現了兩級邏輯綜合的「 espresso 」演算法,定義與系統相適應的數據結構,重新測試各種開關條件,使之適用於系統的實際應用。
  11. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層次綜合的研究中,介紹了在深亞微米工藝條件使用的方法和asic設計流程,討論了高層次綜合的核心如何從描述推出電路構成的設計思路,針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法,給出了用vhdl語言進行代碼設計時的規范和風格,在面向soc的驗證策略討論了動態和靜態的驗證技術,提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  12. Arithmetic logic unit data flow

    算術邏輯單元資料流
  13. According to the relationship between characteristics of the traffic flow and traffic congestion, fuzzy logic is adopted to partition the basic parameters ( mean velocity and flow volume ) into several fuzzy subsets, then fuzzy inference system is established to generate loc

    通過分析交通流基本參數與交通擁擠現象之間的關系,本文運用模糊數學的方法對交通參數(交通流量和平均速度)以及擁擠度進行描述,建立了交通擁擠度的模糊推理系統。
  14. Secondly, on the basis principles of mis and erp, combining the design and development of the management information system of the industrial company of green hill in chongqing ( qsmis ), basing the foundations of system and demands analyzing, it carried on more detailed argumentations of module designing, data system, network and structure of system, modes of calculation etc. especially, it gave the discussing about flow rebuilding, technology of coding, interface designing, and system optimizing. at the same time, it expatiated the safety precautions of system, and explained the main ability and effects of system by the overall frames and charts of system ' s structure, and every logic flow chart of module of function of qsmis briefly

    其次,在充分理解mis和erp原理基礎上,結合重慶青山工業公司管理信息系統( qsmis )的設計和開發,在系統需求分析的基礎上,對系統的功能模塊、數據庫系統、網路拓撲及體系結構、計算模式等進行了較詳細的論述;尤其是對系統開發中實施的業務流程再造、編碼技術、界面設計、及系統優化等關鍵技術進行了較為系統的探討,同時對系統所實施的安全策略進行了闡述;並通過設計出的qsmis的總體框架以及系統結構圖、各功能模塊的邏輯流程圖,對系統實現的主要功能和作用作了簡要概述。
  15. A diagram like this is better on the eyes and can make it much easier to spot any errors in the logic flow

    一個這樣的圖示有助於我們理解,也更容易找出邏輯流中的錯誤。
  16. Tracing the logic flow through the program, you see that the first time through the loop, the value of the variable

    通過跟蹤程序的邏輯流可以看到,第一次通過循環后,變量
  17. A struts diagram connection is a line that represents either logic flow or data flow between two struts nodes

    Struts圖連接是一條線,它表示了兩個struts節點之間的邏輯流或數據流。
  18. Your choice of software tools is also important : if you want to track and communicate project requirements, map testing plans to each requirement, and use models to visually demonstrate data and logic - flow, then the artifacts and data must be accessible to all team members everywhere

    您對軟體工具的選擇也是很重要的:如果您想要跟蹤並傳達項目需求、對每個需求實施測試計劃、並使用模型可視化地說明數據和邏輯流,那麼工件和數據就必須發送到在各個地方的所有團隊成員。
  19. Table 1 offers a comparison of the logic flow of the two methods, and illustrates what happens on specific lines in listings

    表1提供了對兩種方法的邏輯流程的比較,並演示了清單
  20. A mpfmuc logic flow was put forward further to decrease the problem solving difficulties consulting some tactical assumptions. the mission planning problem was decomposed into several sub - problems of different layers by inter - layered and intra - layered decoupling in the flow. the cooperative ucavs mission assignment and the path planning problems were extracted from the sub - problems

    在此基礎上,依據一定的戰術約定,進一步提出了多ucav協同任務規劃邏輯流程,通過層間和層內解耦將問題分解為不同層次的子問題,有效降低了任務規劃問題的求解難度。
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