logic high 中文意思是什麼
logic high
解釋
邏輯高電平-
Expert system has many merits. it has the ability of heuristic illation, and can explain for illation and append new knowledge in the knowledge database. but it also has obvious shortcomings, such as, poor ablitity in ka ( knowledge achieve ), inefficient and incomprehensive. the artificial neural network has the ablitity of parallel processing, associative memory, distributed storage of knowledge and high robust etc. it also has perfect characteristics of self - organizing, self - adaptive, self - learning. it specializes in visualize ideation but is short of logic ideation
專家系統在故障診斷領域得到廣泛的應用，專家系統具有許多優點，能利用專家的知識進行啟發式推理，能夠解釋其推理過程，並能夠不斷地、靈活地增加新的知識。但專家系統也存在明顯的缺陷：獲取知識能力差、效率低、范圍窄。可以說專家系統長于邏輯思維缺乏形象思維。 -
The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬體設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼； fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制；視頻數據幀存模塊為大量高速的視頻數據提供緩沖區；基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號； d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用： i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼晶元的初始化。 -
Superior frequency characteristics shortest recovery time, realize the switching of the circuit, complete functions such as open and close, clip wave, wave detector, high - frequency rectifier, logic control, which fit for all kinds of digital circuits and analog circuits
具有良好的高頻開關特性反向恢復時間短，可實現對電路開和關的控制功能，可完成開關限幅檢波高頻整流邏輯控制等功能，適用於各類數位電路類比電路。 -
In this paper, based on the study of vga graphic displaying theory and the theory of synchronizing display between led large - screen display system and crt image, a method, bit plane addressing method which has good effect -. high ratio of performance to price and can be implemented easily in circuits is discussed. and the principle and the implementation of the multi - gray led display system with programmable logic devices cpld and fpga are analyzed in detail
本文在分析vga圖象顯示原理和led大屏幕與crt視頻圖像同步顯示原理的基礎上，論述了一種顯示效果較好、性能價格比高、電路上易於實現的方法? ?位平面尋址法實現多灰度圖象，並詳細分析了應用復雜可編程邏輯器件cpld和在線可編程邏輯器件fpga實現多灰度彩色led大屏幕圖像顯示的原理及電路實現。 -
The research on bypass carrier wave protection not only possess his theory value - studied protector ' high frequency signal as well as and dispatch signal logic, penetrate into learn protector ' occlusion type carrier wave protection logic about, but also has important signality in fact ? rovide practice system operation scheme with theory and test evidence
對旁路代路時高頻保護配對方案的研究不僅具有其理論價值?對保護裝置的高頻信號以及收發信邏輯進行研究，深入了解保護裝置的閉鎖式高頻保護邏輯，而且具有較大的現實意義?為實際系統運行方案提供理論和試驗依據。 -
Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
本文首先對數字減影血管造影（ dsa ）成像系統的組成結構和數據流向進行了深入研究和分析，並對系統中的數據流向進行了完整的歸納和總結，給出了x線數字成像系統中的高速大容量數據通道的設計方案；在對sdram的控制方式做了深入探討后，給出了實現大容量多條sdram共同工作的解決方案，在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲；通過對pci總線介面的深入研究，優化後端狀態機設計和低層驅動程序開發，給出了完整的pci介面方案實現高速dma數據傳輸，完全可以滿足視頻傳輸要求；深入研究了基於大規模可編程器件的數字系統設計方法，針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點，提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案，從而實現利用fifo來協調系統各模塊之間的數據高速傳輸。 -
Through the introducing the conception of " animal behavior logic " in behavior animation, the concerted control scheme that combined the high - level uncertainly goal - directed behavior and lower - lever predefined behavior was established, and the imu1ation experiment was carried on taking the fish group animation as an example
通過在行為動畫中引入「動物行為邏輯」的概念，給出了高層非確定性目標導向行為與低層確定性預定義行為相結合的協調控制方案，並以魚群動畫為例進行了模擬實驗。 -
The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl
該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。 -
High - density logic device based on fpga is designed
基於fpga的控制電路，提高了系統的集成度。 -
First, based on the analysis of the design method of two - valued shift counter, we use the multivaled circuit ' s property of high information density to put forward the design method of three - valued shift counter. by using this method module - n three - valued shift counter can be designed. and by selecting the best design method, the simplest circuit of control logic can be made
首先，在分析二值的移位計數器的設計方法的基礎上，利用多值電路的高信息密度，提出了三值移位計數器的設計，運用該方法可以設計任意狀態的三值移位計數器，並且通過選擇最佳設計方案使控制邏輯電路最簡。 -
Visual rice growth models ( vrgm ) and rice expert system of cultivation management for high yield were established by synthesizing the results of " national rice project " and combining the cultivation knowledge, experience of experts, while the techniques of artificial neural network and fuzzy logic were employed to improve the rice growth models and the expert system. the main results are as follows
本研究系國家「九五」攻關項目「水稻大面積高產綜合配套技術研究與示範」課題的子專題，結合水稻高產栽培技術資料和水稻專家的知識、經驗以及科研成果，研製成了可視水稻生長模型（ visualricegrowthmodels ， vrgm ）及水稻高產栽培專家系統，並在此基礎上進一步利用人工神經網路模型、模糊邏輯技術和田間栽培試驗，對生長模型和專家系統進行了改進。 -
By analogizing the concept of particle collides in high - energy physics, we proposed the particle model of logic function, and constructed the particle collide arithmetic of logic function predigest according to this model, finally using vc + + 6. 0 programming realized it
摘要類比高能物理中粒子碰撞的概念，提出了邏輯函數的粒子模型，根據此模型構造了化簡邏輯函數的粒子碰撞演算法，並用vc + + 6 . 0編程實現。 -
With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit
在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。 -
The features of the new type of integration scheme can be described as follow : high division and easy debug are achieved in the scheme ; accumulative total is used, and the discord of integer part and decimal part are avoided in the scheme ; it can divide as well as detect direction ; it can integrate the counter into isp device and then evaluate the maxim frequency of the counter ; it also integrate square wave and some logic devices into isp device, and then improve integration, reliability, stability ; and have the character of software designation instead of hardware designation and in - system programming, and it becomes very easy to modify the circuit and to extend the function
新型的集成化設計方案具有以下特點：細分數高而且調整方便；採用累積計數，避免大小數分別計數的不協調；細分同時完成辨向；可以在isp器件內完成計數功能，從而提高了計數器的最高工作頻率；同時將方波發生器和一些外圍的數字電路集成在一片isp器件內，提高了系統的集成度，性能可靠穩定；具有硬體設計軟體化及在系統可編程的特點，便於電路的修改和功能的擴展。 -
2. the high performance realization rules and experiences are discussed at the level of micro - architecture, logic and layout respectively
2 ）分別在結構級，邏輯級和版圖級分析了高速數字電路的高速解決方案。 -
The stakeholder " s logic of finance governance explains the rationality of the fact that there are different modes of finance governance. finance governance would have effective on condition that the interest body, which has the high correlativity of interest and the strong ability of negotiation, become the body of finance governance
財務治理的利益相關者邏輯解釋了多種財務治理模式並存的合理性，有效的財務治理是利益相關度與談判能力均高的利益主體成為財務治理主體。 -
The hardware of the system is composed of a high - speed optical - isolator circuit, a first - in / first - out dual - port memory buffer circuit, a pci interface chip ql5032, and a logic control circuit
系統的硬體部分是由高速光電隔離電路，雙埠fifo存儲緩沖電路， pci總線介面電路ql5032及邏輯控制電路等組成。 -
High threshold logic
高閾值邏輯 -
Thirdly the article introduces situation of longdong hydro plant and its program design, then introduces the most featured hardware - - programmable logic controller ( plc ), which satisfied the users with its high reliability and flexibility
文中還介紹了龍洞電廠的實際情況和據此所作的規劃設計，介紹了本系統中最具特色最為核心的硬體基礎? ?可編程序控制器。 -
All 1553b protocol handlings are realized by soc hardware logic, high reliability can be assured
所有協議均由硬體邏輯自動完成，可靠性高
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