metal chip 中文意思是什麼
metal chip
解釋
金屬碎片-
Secondly the major mechanisms of degeneration of pcss are caused by both the filamentary nature of the current in high - gain pcss damage to the chip of the switch and the charge domain reached the anticathode causes the erosion of metal interface
開關退化的主要原因是:開關體內的絲狀電流對開關晶元的損傷;以及電荷疇到達陽極時來不及放電而產生的電荷擁擠現象對開關電極接觸表面的損壞。 -
An integrated circuit looks like nothing more than a tiny silver-gray square or chip of metal.
集成電路看上去就象一個小小的銀灰色的正方形塊或金屬塊。 -
The processes include the deposition of the waveguide film, the design and fabrication of the mask pattern, the lithography, the metal coating with a magnetic sputtering, the lift - off process for the metal mask, the dry deep etching by icp, the slicing of the wafer, the polishing of the cutting edge, the fiber - to - waveguide alignment and at last, the performance testing. some edg chip samples are fabricated
對設計好的集成波導器件，本論文設計並試驗了器件的製作的全部工藝，包括波導薄膜的沉積，掩模的設計製作，光刻，濺射金屬薄膜，剝離法製作金屬掩模，干法深刻蝕，矽片切割，端面磨拋，波導對準和性能測試。 -
Shorts between metal runners are important only in those regions of the chip with a high density of closely packed metal runners.
金屬布線間的短接，僅在那些具有高密度密集封裝型金屬布線的晶元中才極為重要。 -
I have designed the multilayer chip inductor take this material as the foundation and discussed a little influences of the metal wire arrangement structure and via in the parameters of inductor
在以此材料為基礎設計了多層片式電感，初步探討了金屬導線的布置結構及通孔對電感元件的一些參數的影響。 -
Water soluble metal working fluids, iron chip corrosion test for
水溶性金屬加工液的鐵屑腐蝕試驗 -
An accurate arithmetic for on - chip spiral inductors with gradually changed metal width and space
精確高效的漸變結構片上螺旋電感的電感值分析技術 -
The entire process of building a sound chip is fully compatible with the standard industry process for semiconductor manufacturing, called complementary metal oxide semiconductor, or cmos
聲音晶片的全部製程，是完全相容於互補式金屬氧化物半導體（ cmos ）的工業標準製程。 -
Remove metal chip
去除金屬碎片 -
Study on the ferrous metal survey using the hall sensor of single - chip microcomputer mcs
單片機在霍爾式鐵金屬檢測裝置中的應用 -
Back then, chip designers considered it risky to add two or three layers of metal on top of the silicon wafer because each new layer added hills and valleys that made it difficult to keep photolithographic patterns in focus
當時的晶片設計者認為在矽晶圓上加上兩三層金屬有點冒險，會使晶圓表面凹凸不平，增加光刻過程中聚焦的困難。 -
Fourthly, new type of keyboard circuits designed in this chip can save the system working time and reduce the power dissipation according to usual polling circuits. the chips are on two die of 2 * 2 mm2 using 0. 6um cmos mix - signal technology ( double well, double poly, double metal ) including sending part and receiving one respectively
本晶元採用數模混合設計，參加了由上海集成電路中心（ icc ）組織的mpw （多晶圓）計劃，在無錫上華半導體有限公司流片，採用上華0 . 6um混合cmos工藝（準雙阱、雙層多晶硅、雙層金屬） 。 -
This chip has been implemented in the smic 0. 18 m cmos process with single - poly, six - metal and mim capacitors
該晶元在smic單層多晶， 6層金屬， n阱0 . 18 m標準cmos工藝線上一次流片成功。 -
The lastic, metal, or ceramic container that enclose a ic. ackage rotect the chi and ring the lead from the outside world to the chip
封住ic所用的塑料、金屬或陶瓷包裝。封裝可以保護晶元，並使晶元與外部世界連接。 -
Metal substrate includes solid lubricant or must contain the fragile material grinding ex. chip of low grinding downforce
用途可同時加工表面軟硬不同材質如金屬基材中含固態潤滑劑，或者須有低研磨下壓力之易脆材質研磨如晶片。 -
Abstract : the forming mechanism of the cross section of unbroken metal fibers manufactured by the combined cutting of big inclination cutting and chip pulling cutting is analyzed
文摘:分析了採用大刃傾角-拉屑復合切削方法製造連續型金屬長纖維時纖維橫截面的形成機理。
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