microwave synthesizer 中文意思是什麼
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This dissertation is based on the theory of phase lock loop ( pll ) and the design of frequency synthesizer, and the summing up of the work on the microwave and millimeter wave ( mm ) frequency synthesizer
本文是在充分了解鎖相環（ pll ）的理論和各種頻率合成技術的基礎上，對微波毫米波頻率綜合器的理論探索和實際研製工作的總結 -
Frequency source is widely used in today ' s electronic equipment and even refered as " a heart " of many electronic systems. the frequency synthesizer with a lot of channels and high frequency stability by means of theory of phase locking has almost been a necessary component in the modern electronic systems such as telecommunication, radar and electronic countermeasure. the phase - locked frequency synthesizer can be generally divided into two kinds : one is digital phase locked frequency synthesizer, the other is analog sampling phase locked frequency synthesizer. compared with the prior, the latter has many merits such as lower phase noise, samller volume, lighter weight and lower power consumption and has a wide foreground in the equipments of microwave band
利用鎖相原理來獲得波道數目眾多、頻率穩定度很高的頻率合成器，幾乎已成為現代通信、雷達和電子對抗等電子系統不可缺少的組成部分。鎖相式頻率合成器一般分為數字鎖相頻率合成器和模擬取樣鎖相頻率合成器兩類。取樣鎖相頻率合成器與數字鎖相頻率合成器相比，具有相位噪聲低、體積小、重量輕和功耗低等優點，尤其在微波波段的電子設備中，具有廣闊的應用前景。 -
This paper introduces the realization scheme and key technology of 2 ~ 12ghz ultra - wideband microwave frequency synthesizer. it adopts dds + pll frequency synthesizer scheme to realize low end frequency 2 ~ 4ghz output, then through segment amplifying multiplying chain realize from 2 ~ 4ghz expand to 2 ~ 12ghz, and the output frequency is selected by microwave switch
採用dds + pll的混合頻率合成方案實現低端頻率2 ~ 4ghz的輸出，再通過分段放大倍頻鏈路實現從2 ~ 4ghz到2 ~ 12ghz的擴頻，並由微波開關控制選頻輸出。 -
The thesis describes a prototype fractional frequency synthesizer which is supported by a project granted by the ministry of science and technology of pr china. firstly, based on the principle of pll, this paper briefly describes three basic pll components : phase detector ( pd ), low pass filter ( lpf ), voltage controlled oscillators ( vco ), analyzes the linearized pll and summaries the transfer functions of third - order pll with ideal intergrator filter respectively. based on a microwave vco, the single point frequency pll frequency ranging from 2. 2 to 2. 5ghz is developed
首先，從鎖相環的基本理論、原理出發，分析了鎖相環中的三個基本部件：鑒相器、環路濾波器和壓控振蕩器，此後，針對線性化鎖相環進行了分析，研究了在使用比例積分濾波器時，三階鎖相環的環路參數計算；在電路實現時選用了lmx2353 ，在此基礎上，完成了2 . 2 ~ 2 . 5ghz范圍內的小數頻率合成器設計。 -
This paper mainly introduce the teconology of design modern microwave hopping frequency pll synthesizer with low phase noise. on the foundation of analysis of phase noise performance of pll circuit, i made some reasearch in system shcemes and methods for low phase noise design of microwave hopping frequency pll. some innovative ideas of low phase noise design about pll is presented in this paper
本文主要研究現代微波鎖相跳頻源低相噪設計技術。在對鎖相環噪聲性能分析的基礎上，對現代微波鎖相跳頻源多種低相位噪聲設計方案進行分析研究。提出了低噪聲鎖相跳頻源設計的一些獨道見解。
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