mos circuits 中文意思是什麼

mos circuits 解釋
mos電路
  1. Therefore, the solution to the hot - carrier degradation of mos circuits is obtained. the other hot - carrier immunity techniques such as

    對抗熱載流子退化的mos器件lddnghtlydopeddrain ）結構及柵氧化層加固技術也作了簡單的介紹。
  2. With the high development of the quantum circuits, the testability of the circuits will become a very serious problem. the method of testability design for rt circuits is proposed in the end of this paper, which has high testability and low hardware cost. only adding one extra mos transistor and two control ports, it can detect all open and short faults in rt circuits

    隨著量子電路的飛速發展，由於其本身所特有的高集成度特點，電路的測試必然會成為越來越嚴重的問題，因此論文在最後就電路中常見的開路、短路故障提出了rt電路的可測試性設計方法，並針對具體的mobile電路進行了可測試性設計， pspice模擬結果表明達到了可測試的目的。
  3. Finally, according to the mosfet ' s parameter degradation due to hot - carrier effects and different application environment of mos devices on analog and digital circuits, the circuit structures for hot - carrier immunity are proposed for digital applications by adding a schottky diode in series with the drain of the nmosfet suffered heavily from hot - carrier degradation.,

    即在受熱載流子退化效應較嚴重的n mosfet漏極串聯一肖特基二極體的新型cmos數字電路結構和串聯一工作于線性區的常開n mosfet的mos模擬電路結構。經spice及電路可靠性模擬軟體bert2
  4. Semiconductor devices lntegrated circuits part 2 : digital integrated circuits section five - blank detail specification for complementary mos digital integrated circuits, series 4000b and 4000ub

    半導體器件集成電路第2部分:數字集成電路第五篇cmos數字集成電路4000b和4000ub系列空白詳細規范
  5. Semiconductor devices - integrated circuits. part 2 : digital integrated circuits. section four - family specification for complementary mos digital integrated circuits, series 4000b and 4000ub

    半導體器件集成電路第2部分:數字集成電路第四篇cmos數字集成電路4000b和4000ub系列族規范
  6. In this course, we study low - power computer design techniques involving mos circuits, logics, computer organization, function units, pipeline, bus protocols, memory subsystems, compiler, os, and virtual machines

    本課程中，我們將研讀計算機低功耗設計技術，內容涵蓋mos電路，邏輯，計算機組織，功能單元，管線處理，匯流排規約，記憶體子系統，編譯器，作業系統，及虛擬機等的相關設計。
  7. In conventional cmos charge pump circuits, the pumping high voltage is limited by mos threshold voltage, so that it can not use less cascade stages to pull up a high voltage which we want to generate

    在傳統的cmos電荷泵電路中，電荷泵輸出的電壓受mos管的閾值電壓限制，所以當要求電荷泵的輸出電壓較高時，則不得不連很多階來達到要求。
  8. Specification for harmonized system of quality assessment for electronic components - family specification : digital integrated hc mos circuits series hc hct hcu

    電子元器件質量評定協調體系規范.系列規范:數字集成hc mos電路系列hc hct hcu
  9. Harmonizec system of quality assessment for electronic components digital integrated hc mos circuits. series hc hct hcu. family specification

    電子元器件數字hc mos集成電路質量評估協調體系. hc hct hcu系列.系列規范
  10. Harmonized system of quality assessment for electronic components ; blank detail specification : mos read write static memories silicon monolithic circuits

    電子元件質量評估協調體系.空白詳細規范.第1131部分
  11. Harmonized system of quality assessment for electronic components ; blank detail specification : mos read wirte dynamic memories silicon monolithic circuits

    電子元件質量評估協調體系.空白詳細規范.第1132部分
  12. Harmonized system of quality assessment for electronic components. mos read write dynamic memories silicon monolithic circuits. blank detail specification

    電子元件統一質量評審體系.集成電路動態可讀可寫隨機存取存儲器.分規范
  13. Harmonized system of quality assessment for electronic components. mos read write static memories silicon monolithic circuits. blank detail specification

    電子元件統一質量評審體系.集成電路靜態可讀可寫隨機存取存儲器.空白詳細規范
  14. Specification for harmonized system of quality assessment for electronic components - blank detail specification - mos read write dynamic memories silicon monolithic circuits

    電子元器件用質量評估協調體系.空白詳細規范. mos讀寫動態存貯器單晶硅電路
  15. Specification for harmonized system of quality assessment for electronic components - blank detail specification - mos read write static memories silicon monolithic circuits

    電子元器件用質量評估協調體系規范.空白詳細規范. mos讀寫靜態存貯器單晶硅電路
  16. Harmonized system of quality assessment for electronic components ; blank detail specification : mos ultra - violet light erasable electrically programmable read only memories silicon monolithic circuits

    電子元件質量評估協調體系.空白詳細規范.第1130部分
  17. Harmonized system of quality assessment for electronic components. mos ultra - violet light erasable electrically programmable read only memories silicon monolithic circuits blank detail specification

    電子元件統一質量評審體系.集成電路可抹只讀存儲器和可編程序存儲器.空白詳細規范
  18. Static mos circuits

    靜態金氧半導體電路
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