one time programmable 中文意思是什麼

one time programmable 解釋
一次可編程的
  • one : adj 1 獨一個的,單一的。 one hand 一隻手。 one shot 只出一期的雜志。 O swallow doesn t make a sum...
  • time : n 1 時,時間,時日,歲月。2 時候,時刻;期間;時節,季節;〈常pl 〉時期,年代,時代; 〈the time ...
  1. One time programmable read only memory optrom

    一次編程只讀內存
  2. Danfoss room programmable thermostat integrates room temperature controller and time controller device together, divides one day into six hours and the temperature setting

    丹佛斯可編程房間溫控器將房間溫控器和時間控制器的功能集於一體,可將每天分成6個時間段和溫度設定。
  3. First, the complete machine is controlled by the germany siemens programmable local controller ( plc ). secondly, mitsubishi e - 540 variable frequency main shaft stepless speed regulation function is provided. thirdly, siemens chinese td - 200 text panel indicator is used for parameter set. the winding number, tension and velocity can be modifies at real time. in addition, the complete machine has high degree of automation. the work of filling in workpiece, clamping, moving workpiece to the winding position, winding, trimming and holding line head etc can be finished for one time

    參數設定採用西門子中文td - 200文本面板顯示器,可對匝數繞線張力、繞線速度參數進行實時修改。整機自動化程度高。從工件放入工件夾緊送工件至繞線位繞線剪線並夾住線頭… …一次性完成。
  4. These memory devices can be programmed only once, so they are sometimes referred to as write - once or one - time programmable devices

    這種內存設備可以被編程一次,所以它們有時被作為寫一次或一次性編程設備來看待。
  5. The time division circuit and latch counter are integrated in one chip of programmable logic device, which makes the size greatly decreased

    同時採用cpld晶元實現了時間分割電路和計數鎖存電路,有效地減小了電路體積。
  6. This is one kind project of hardware multiplexer based on the high - performance system on a programmable chip ( sopc ). in the project author integrate with the software and the hardware on a field programmable gate array ( fpga ), not only simplifying the overall system design, moreover realizing stably, high speed, low cost multiplexer ’ s design. the dissertation carry on three verification step that include function verification 、 time verification and prototype verification to guarantee each ip can work normally to satisfy the system performance requirement. then author introduce the realization of the multiplexer in detail, as well as the test and the debugging questions met in practice and solution of the questions

    本方案是一種基於可編程片上系統( sopc )的硬體復用器設計方案,其特點是將系統的軟體和硬體集成在一款現場可編程門陣列( fpga )上,使用該方案不但簡化了整個系統,而且實現了穩定、高速、低成本的復用器設計。對系統中各個功能模塊的整合和驗證採用功能模擬、時序模擬、原型驗證三個步驟進行,保證系統中各個功能模塊可以正常工作,並滿足系統的性能要求。然後詳細介紹了復用器的實現,以及測試和調試中遇到的問題及解決方法。
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