parallel computer hardware 中文意思是什麼

parallel computer hardware 解釋
并行計算機硬體
  • parallel : adj 1 平行的;并行的 (to; with); 【電學】並聯的。2 同一方向的,同一目的的。3 相同的,同樣的,相...
  • computer : n. 1. 計算者。2. (電子)計算機;計量器。-ism 電子計算機主義〈認為電子計算機萬能等〉。-erite, -nik 計算機專家;計算機工作者。
  • hardware : 1 五金器具;金屬製品。2 (計算機的)硬體;(電子儀器的)零件,部件;(飛彈的)構件;機器;計算機...
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究,提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術,提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案,實現該方案所需增加的電路少,可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。
  2. Associating with the research and development of national natural heavy concentrate system, considering the feature of natural heavy concentrate database separately stored in every province, which is of mass data, discrete, irregular distribution, and influenced by hardware factors, such as computer configuration and network transfer speed, distributive database and parallel computing philosophy is applied, zone partition and multi - threading queue method is employed to retrieve and process the discrete data within a certain polygonal zone

    結合全國自然重砂系統研製,針對分散存放在全國各省的自然重砂數據庫,數據海量、離散、分佈無規律、受計算機配置、網路速度等硬體因素影響的情況下,應用分散式數據庫及并行運算理念,採用區域分片及多線程隊列方法對某個多邊形區域內的離散數據進行檢索與處理。
  3. This article introduces the developing history and the current situation of the automatic goal discern, and on the basis of structure of the parallel computer and neural network knowledge, it analyses the hardware and software engineering foundation that realized the real - time goal recognition system

    介紹了自動目標識別的發展歷史和現狀,在并行計算機結構和神經網路知識的基礎上,分析了實現實時目標識別系統的硬體和軟體技術基礎。
  4. The hardware circuit and software of the portable copying instrument is researched. a feasible structure scheme is put forward according to the desired function, at89c51 single chip computer is used as the core of the instrument, zlg7289a and many kinds of new type circuit chip ( including : parallel data memory - ds1245, sms0823 lcd ) are used as interface during hardware circuit designing, the printer ' s port and rs232 communication interface is also designed

    硬體電路以at89c51單片機為核心,以zlg7289a按鍵組集成晶元作為人機介面,並採用新型電路晶元(包括大容量并行數據存儲器ds1245 、液晶顯示器sms0823 )設計手持抄錄器的硬體電路,並設計了手持抄錄器的印表機介面和rs232通信介面,從而簡化了電路,減小了手持抄錄器的體積,按鍵的軟體實現過程。
  5. This hardware system has fully utilized interface hpi of host computer and memory resource that dsp offers, realizes parallel structure of share memorizer mode skillfully, the whole system structure is succinct, the programming is convenient and flexible, the expanding can be strong

    該硬體系統充分利用了dsp所提供的主機介面hpi和內存資源,巧妙地實現了共享存儲器方式的并行結構,整個系統結構簡潔,編程方便、靈活,可擴展性強。
  6. The relevant program of both the dongle and the computer have also been developmented. a parallel port and a serial port are provided for the pcb. there is a program ( in vhdl, vhsic hardware description language ) carrying out in the pld which implementi ng the parallel protocol. an encrpt arithmetic is designed and embeded in pld. to providing a interface for the user, a dll ( dynamic link library ) is developmented in c + + builder

    所設計的電路板上可以選擇連接串列口或者并行口,在pld內用vhdl ( vhsichardwaredescriptionlanguage ,硬體描述語言)實現了並口的通信協議和一個自行研製的密碼演算法,並在c + + builder環境下開發了配套的上位機軟體,主要是提供了dll (動態鏈接庫)和一些函數用於pc機和加密鎖之間進行通信。
  7. The thesis describes in detail the experimental software and hardware environment of the parallel fastlsa algorithm : building of personal computer parallel clustering system based on linux operation system and software distributed shared memory system

    本論文也詳細的描述了并行fastlsa演算法的實驗環境: pc并行機群系統, linux操作系統及其軟體分散式共享內存系統( dsm ) 。
  8. With the fast development of scientific research, more and more new computer technologies have already been introduced into many research fields successfully. from hardware resources to new software methodologies, such as network technology ( intranet / internet / grid ), cluster, collaborative design, parallel and distributed computing, virtual reality, integrated and intelligent cad / cae / cai ( computer aided innovation ) system, 00 method and expert system, all of them can make great influences on their corresponding research fields

    本文利用面向對象的方法(面向對象分析與面向對象程序設計) ,結合相關的網路應用技術(局域網廣域網網際網路等) ,將集群并行計算、 web計算以及網路工程設計等概念引入土木工程分析設計以及有限元數值分析領域,最終初步形成一個集成的基於網路的工程設計與有限元分析系統框架netfeaf ( networkbasedfiniteelementanalysisframework ) 。
  9. In the process of designing hardware, the principal and subordinate structure is adopted : the principal cpu accomplishes the communication with the group host computer ; the subordinate cpus accomplish the communication with some command post computers and observe post computers ; the principal and subordinate cpus exchange data through parallel bus to realize the communication between the group host computer and its subordinate computers

    在硬體系統設計中,採用了主從結構:主cpu完成與群主機通信,從cpu完成與各指揮所、觀察所計算機通信,再通過主從cpu間并行總線的數據交換來完成群主機與其下屬計算機的通信。
  10. The platform consists of a dc motor, a decelerating mechanism, a driving unit, an i / o circuit of interface, several kinds of sensors and a pc with control software. the communication between the software and the hardware can be implemented on the basis of pc parallel port. this platform uses computer control technology to realize its functions, but for users it can achieve analogue and digital control

    平臺由直流電機、機械減速裝置、驅動模塊、 i o介面電路、各種傳感器件和安裝了控制軟體的個人計算機組成,軟硬體通過計算機并行口進行通訊,其內核採用計算機控制技術,對用戶來說既可以作為模擬控制器,也可以實現數字控制器。
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