parasitic current 中文意思是什麼
parasitic current
解釋
寄生電流-
With the best modulation strategy which was found on condition that it must have largest energy transfer ratio, smallest current ripple of the inductor, and realizing zvs of each switches, the converter overcomes the drawbacks presented by the conventional zvs fb converter, such as high voltage stress of each switches, large current ripple of the inductor, and severe parasitic ringing on the rectifier diodes, so it can get higher efficiency, faster respond speed, and wider application area. the operation principle of the proposed converter is analyzed and verified by a 3kw, 50khz experimental prototype. experiments and research results show that the scheme of the tl topology derivation is reasonable, adjusted modulation strategy makes some other severe problems in conventional topologies easy to solve or makes the converter more competitive
研究結果表明，本文提出的三電平拓撲變換方案合理，針對各種三電平拓撲尋找到的控制策略可以解決變換器存在的某些問題或使變換器表現出更突出的優勢：例如針對單管直流變換器三電平拓撲的控制策略可以減小電感的設計值，針對推挽直流變換器三電平拓撲的控制策略可以實現開關管的軟開關、解決變壓器偏磁問題等，針對全橋直流變換器三電平拓撲的控制策略可以減小電感的設計值、實現開關管的軟開關等。 -
With the software cadence, model establishment and parasitic parameter extraction are made on the main pcb lines of the proposed circuits. equivalent circuit models of common mode combined with differential mode current and noise simulation models are also established on full bridge switching - mode converters. study on the simulation of conducted interference noise is made with the software saber and the effects on the circuits " noise by the main parasitic parameters are also analyzed
在對全橋開關型變換器電路工作原理分析的基礎上，建立了全橋開關型變換器主要元器件的電磁干擾參數模型，利用cadence軟體對其pcb主要印製導線進行了建模分析和寄生參數的提取，得到了全橋開關型變換器傳導干擾的共模、差模噪聲電流等效電路模型以及噪聲模擬模型，並運用saber軟體進行了傳導性干擾噪聲的模擬研究，分析了主要寄生參數對電路噪聲的影響。 -
Soi, namely silicon on insulator, device and ic have many advantages : low leak current, weak parasitic capacitance, low power loss, radiation hardness, and high integreted level
Soi （ silicononinsulator ）器件及集成電路具有泄漏電流小、寄生電容小、功耗小、集成度高、抗輻射能力強等優點。 -
The results that increasing of bias current and shunted resistance and lowing critical current and connected inductance can decrease the transmission time are shown ; ( 4 ) a new type of circuit, ladder shape multiplayer jtl. structure is provided by author, thus output signal of rsfq circuits can be amplified before transfer to room temperature electronics system. it has highly gain of amplify relatively and the double peak structure are avoided through decreasing parasitic capacitance
（ 4 ）針對目前超導與室溫介面電路的電壓放大器存在的「雙峰」和放大增益效率較低的不足，提出了一種全新的階梯式多層jtl電壓放大電路結構，較好的解決了以上的問題，通過初步的模擬分析證實，該電路的構思極負有創新性。 -
We choose hb qrc convert as the research object. this paper has completely analyzed the circuit work modes, designed an experimental device, analyzed the mam noise source, established the common - mode and different - mode noise current models, extracted the parasitic elements of four pcb layout and simulated each emi level. based on these, it has derived the element which have great effect on pcb emc and has designed the optimized pcb layout
選擇一種半橋準諧振變換器作為研究對象，對其工作原理進行了詳細的分析，製作了實驗樣機，分析了它的主要干擾源，建立了它的共模、差模噪聲電流等效電路模型，對它的四種不同pcb布局進行了寄生參數提取和電磁兼容模擬，在此基礎上分析得到了影響其電磁噪聲水平的最重要因素，並設計出了最優的pcb布局。
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