performance verification test 中文意思是什麼

performance verification test 解釋
性能審認試驗
  • performance : n. 1. 執行，實行，履行；完成；實現；償還。2. 行為，動作，行動；工作。3. 性能；特性。4. 功績；成績。5. 演奏；彈奏；演出；（馴獸等的）表演；把戲。6. 【物理學】演績。
  • verification : n. 1. 證實，證明，確定；核驗，驗證，核對；檢驗，校驗。2. 【法律】訴狀[答辯書]結尾的舉證說明。
  • test : n 1 檢驗，檢查；考查；測驗；考試；考驗。2 檢驗用品；試金石；【化學】試藥；（判斷的）標準。3 【化...
  1. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  2. Steam turbines - acceptance test - thermal performance verification tests of retrofitted steam turbines

    蒸汽渦輪機.驗收試驗.改型蒸汽渦輪機的熱性能檢查試驗
  3. 2 ) in order to improve the performance of gaussian mixture model, we use hypothesize test to do the speaker verification

    2 ）為了進一步提高高斯混合模型的識別效果，採用假設檢驗的方式進行說話人確認。
  4. Fire behaviour of building materials and components ; fire barriers, verification of automatic closure continuous performance test

    建築材料和構件的防火性能.防火間隔.第18部分:自動關
  5. It has been an exigent task to reduce the difficulty of functional verification, cutting down the ratio of verification in the whole design duration, while assuring the coverage of functional verification when designing a high performance processor to solve this problem, the concept of random instruction testing has been introduced here. thus not only a lot of verification engineers " burdens of hand writing test is reduced, but also the influence of man - made factor in the process of testing

    如何在保證效果的同時，降低驗證工作的難度，減少驗證在整個設計周期的比率，已經成為高性能嵌入式處理器設計所迫切需要解決的一個問題。為了解決這個問題，引入了隨機指令測試的概念。這樣一來就可以大大減輕驗證工程師在晶元驗證時人為書寫大量測試的負擔，同時又可以減輕了人為因素在驗證過程中的影響，達到更好的測試效果。
  6. To conduct system verification and performance test, we needed to design an eight channels array signal simulation device

    為進行該系統的功能驗證和性能測試，我們需要設計一個八通道陣列信號模擬器。
  7. This is one kind project of hardware multiplexer based on the high - performance system on a programmable chip ( sopc ). in the project author integrate with the software and the hardware on a field programmable gate array ( fpga ), not only simplifying the overall system design, moreover realizing stably, high speed, low cost multiplexer ’ s design. the dissertation carry on three verification step that include function verification 、 time verification and prototype verification to guarantee each ip can work normally to satisfy the system performance requirement. then author introduce the realization of the multiplexer in detail, as well as the test and the debugging questions met in practice and solution of the questions

    本方案是一種基於可編程片上系統（ sopc ）的硬體復用器設計方案，其特點是將系統的軟體和硬體集成在一款現場可編程門陣列（ fpga ）上，使用該方案不但簡化了整個系統，而且實現了穩定、高速、低成本的復用器設計。對系統中各個功能模塊的整合和驗證採用功能模擬、時序模擬、原型驗證三個步驟進行，保證系統中各個功能模塊可以正常工作，並滿足系統的性能要求。然後詳細介紹了復用器的實現，以及測試和調試中遇到的問題及解決方法。
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