pll phase detector 中文意思是什麼
pll phase detector
解釋
鎖相環相位監測器-
The pll consists of a crystal oscillator, a ring voltage - control - oscillator, a frequency divider, a phase / frequency detector, a charge pump and a loop filter
設計的電路包括20mhz晶體振蕩器，鑒頻鑒相器，壓控振蕩器，固定分頻器，電荷泵和低通濾波器。 -
The motive of this mm frequency synthesizer is also given in this chapter. chapter 2 emphasizes on the pll, first, introduce the module of basic components of pll, such as phase detector, loop filter and the voltage control oscillate ( vco ). secondly, describe the theory of the linearity pll
第一章介紹了頻率綜合器（簡稱頻綜）的發展過程，對各種頻率合成的技術進行了簡單的概括和對比，簡述了毫米波及其特點，並介紹了本文所作研究工作的研究目的及意義 -
Then according to the emphasis of the design, went deeply into the theory of pll frequency synthesizers widely used, described pll ’ s working principle, structure and several types in detail, and made research and analysis of pll frequency synthesizers ’ phase noise, including the effect of the active loop filter on the phase noise, and give some methods to make improvement as well, such as changing loop filter form, reducing divide number, and increase phase detector frequency, etc. then paper introduced the principle character and phase noise analysis of direct digital frequency synthesizer ( dds ) and injection phase lock circuit, which are also important circuits in the design
論文首先對幾十年頻率合成器的發展進行概述，而後針對本次設計的重點，對應用較為廣泛的鎖相頻率合成理論進行了深入的探討，詳細介紹了鎖相環的工作原理、組成結構和鎖相類型，並對鎖相頻率合成器的相噪特性進行了研究分析，包括有源環路濾波器對于相噪的影響，提出了改善相位噪聲的幾點措施:改善環路形式、降低分頻數、增大鑒相頻率等。接著介紹了直接數字頻率合成器（ dds ）和注入鎖相電路的原理特點以及相噪分析，它們也是本次設計的重要電路。 -
The thesis describes a prototype fractional frequency synthesizer which is supported by a project granted by the ministry of science and technology of pr china. firstly, based on the principle of pll, this paper briefly describes three basic pll components : phase detector ( pd ), low pass filter ( lpf ), voltage controlled oscillators ( vco ), analyzes the linearized pll and summaries the transfer functions of third - order pll with ideal intergrator filter respectively. based on a microwave vco, the single point frequency pll frequency ranging from 2. 2 to 2. 5ghz is developed
首先，從鎖相環的基本理論、原理出發，分析了鎖相環中的三個基本部件：鑒相器、環路濾波器和壓控振蕩器，此後，針對線性化鎖相環進行了分析，研究了在使用比例積分濾波器時，三階鎖相環的環路參數計算；在電路實現時選用了lmx2353 ，在此基礎上，完成了2 . 2 ~ 2 . 5ghz范圍內的小數頻率合成器設計。 -
But its performance is as same as common pll at a 5v voltage. so the pll performance is better than other plls at a 5v voltage, especially in power consumption and frequency. finally, the improved pll circuit used in the frequency synthesizer is composed of the improved vco, phase / frequency detector and charge pump. hspice simulation results show that the pll performance is better than other plls implemented by other vco in the same cmos technology
綜合以上的研究與設計，本文用所改進的壓控振蕩器、無死區鑒相器及電荷泵電路組成了用於頻率合成的鎖相環電路，並對此電路進行整體設計及模擬，結果表明其在鎖定時間、頻率范圍、輸出相位抖動及功耗方面具有較好的性能，且對提高鎖相環頻率合成器的整體性能有一定的作用。 -
The fourth, mainly talk about the phase noise in the pll, and discuss the specific affect on out put phase noise caused by different components in frequency synthesizer, such as mixer, amplifier, multipler, divider, oscillator, phase detector etc. the last part is about how to choice the natural frequency of pll in order to get the better performance in phase noise
第二章從鎖相環的基本原理出發，介紹了鎖相環的幾個基本部件:鑒相器?環路濾波器和壓控振蕩器，對線性化鎖相環進行了詳細的分析，對數字鎖相環做了詳細的介紹，分析了鎖相環的相位噪聲模型，討論了頻綜中的混頻器
分享友人