processor arithmetic 中文意思是什麼

processor arithmetic 解釋
算術處理機
  • processor : n. 1. 〈美國〉農產品加工者;進行初步分類的人。2. (數據等的)分理者;【自動化】信息處理機。
  • arithmetic : n. 1. 算術,演算法;計算。2. 算術書。
  1. With the development of the network and the multi - processor system, the research, simulation and the impemeni of the system - level fault diagnosis which is the very important means to increase the reliability of the system, are becoming more and more important. on the system - leve1 fault diagnosis, based on the group theory of system - level fault diagnosis that has been put forward by pro f zhang, the paper constructs newly the theory bases, improves on the matrix method, reinforces and consummates group arithmetic of all kinds of test mode, for the first time, analyses and discusses the equation solution of all kinds of models, so al1 the consistent fault patterns ( cfp ) could be found, straightly and high efficiently, even if the sufficient and necessary condition of t - diagnosable is dissatisfied and the complexity of system - level fault diagnosis is greatly decreased, especialy in strong t - diagnosabl6 system. last the simulation system ' s function has been extended and the application hotspot and the development trend have been disscussed

    本人在張大方教授等人提出的基於集團的系統級故障診斷的理論基礎上,重新構建了系統級故障診斷的理論基礎,定義了系統級故障診斷測試模型的三值表示;改進了系統級故障診斷的矩陣方法,重新定義了測試矩陣、鄰接矩陣、結點對、結點對的相連運算、極大準集團和斜加矩陣,由此能直觀、簡便地生成集團和極大獨立點集;補充和完善了各類測試模型的系統級故障診斷的集團演算法,通過定義集團測試邊和絕對故障集,簡化了集團診斷圖,由此能較易地找到所有的相容故障模式,即使不滿足t -可診斷性,大大減少了系統級故障診斷的復雜度,尤其是對強t -可診斷系統;首次分析探討了各類測試模型的方程解決,由此從另一角度能系統地、高效率地求出所有的相容故障模式( cfp ) :擴充了系統級故障診斷模擬系統的功能,快速、直觀和隨機地模擬實驗運行環境,進行清晰和正確的診斷,同時提供大量的實驗數據用於理論研究,優化演算法和設計。
  2. 3 - d graphics on mobile phones is quite similar to 3 - d graphics on pc in years past. there is no hardware acceleration, and processor speeds are quite low, and there also is the lack of floating point arithmetic unit in mobile phones

    因此論文從通用的部分開始論述,然後明了移動平臺的特徵,並試圖解釋三維引擎的一般原理和設計一個具有粗適性的基於游戲的三維圖形引擎。
  3. This digital amplifier made up of a digital inverter can implement the sine voltage signal ' s power amplifying based on the digital signal processor. with the high processing ability of dsp, the advanced digital control arithmetic can be realized in the software. also the feasible and effective technique for the time delay compensation of digital control can be achieved

    該放大系統用數字化逆變器來實現電力系統正弦電壓信號功率的放大,利用dsp數字處理器高速的處理能力,可以使系統實現高性能的演算法控制,並且能靈活地對系統的誤差進行補償,從而實現逆變系統的高性能和高精度,為解決電力系統電容式互感器二次側帶負載能力弱的問題進行了有意義的研究。
  4. A processor is composed of two functional units ? a control unit and an arithmetic / logic unit ? and a set of special workspaces called registers

    處理器由兩個功能部件(控制部件和算術邏輯部件)與一組稱為寄存器的特殊工作空間組成。
  5. In a computer, a functional unit that interprets and executes instructions. note : a processor consists of at least an instruction control unit and an arithmetic and logic unit

    計算機中,解釋並執行指令的一種功能單元。注:處理器至少包含有一個指令控制器和一個算術與邏輯運算器。
  6. Based on the theory model of quantum computing and the quantum computing technique in existence, we have proposed the cooperating architecture of quantum computer. in this architecture, it uses the classic processor as its control unit, and use the quantum arithmetic logical unit and quantum memory unit as its co - process unit

    針對這種情況,通過對量子計算技術的深入研究,全面剖析現有量子計算系統,借鑒經典計算機中的研究成果,作者提出了協同量子計算機體系結構方案,在該方案中,使用經典計算機完成量子程序中的常規數據處理和程序邏輯控制,而將量子計算部件做為協處理器,只負責完成量子計算。
  7. In order to resolve the contradiction between real - time and arithmetic complex in the television tracking capture system, the paper designs the real - time target track processing system which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    摘要為解決電視捕獲跟蹤瞄準系統中系統的實時性與演算法復雜性之間的矛盾,設計了以高性能的dsp晶元tms320c6416為核心處理器,結合大規模可編程邏輯器件cpld進行邏輯控制以及現場可編程門陣列fpga對採集的視頻數字圖像做預處理的實時目標識別跟蹤處理平臺。
  8. Two perpendicular polarized light states and a no - light state are applied to express information in the ternary optical computer. the three states are transformed via two - dimension liquid crystal element and polarizators, and ternary arithmetic operation and ternary logical calculus completed directly in this way. the ternary optical computer will possess enormously number of bit ( easy to 104 ), light processor, light transmission path and electric control system

    三值光計算機用相互垂直的兩個線偏振光和零光強三個獨立的光狀態表示信息;用二維液晶器件和偏振器實現此三個狀態間的轉換;採用三進制算術運算;直接處理三值邏輯運算;擁有巨大的數據位數(容易超過10 ~ 4位) ;具有光運算、光傳送、電控制等結構特色,具有很強的空間、時間并行性。
  9. Technique. suppose there are six steps as in ieee arithmetic hardware in a floating - point addition as shown in figure 2. a vector processor does these six steps in parallel - if the i

    向量處理器可以并行處理這六個步驟如果第i個數組元素是在第4個步驟中被添加的,那麼向量處理器就會為第( i + 1 )個元素執行第3個步驟,為第( i + 2 )個元素執行第2個步驟,依此類推。
  10. The digital signal processor becomes the preferred utility for realizing digital arithmetic rapidly and precisely relying on its particular hardware and instruction architecture

    而dsp (數字信號處理器)以其特有的硬體體系結構和指令體系成為快速精確實現數字信號處理演算法的首選工具。
  11. So, we must design multimedia application - oriented computer architecture to fit the data processing demand of video compressing programs, we analyzed the parallelism of two representative video compressing programs - opendivx and tml9, and drew a conclusion that it is effective to run video compressing application programs on the processor which uses parallel arithmetic units

    相對于視頻壓縮應用而言,普通計算機的處理能力大大落後于處理需求。因此,對于多媒體應用,必須採用并行的方法來解決,但是不能簡單地使用普通并行機,必須針對這部分應用的特點,採用并行的思想來設計面向多媒體應用的計算機體系結構。
  12. This microcomputer protector for the motor uses the dsp56f807 which is the series of the motorola ’ s dsp56800 as its kernel processor. the chipset not only has single chip ’ s great steering capability but also has digital signal processor ’ s arithmetic capability. it also has reasonable price and high performance

    本微機保護裝置採用了motorola公司生產的dsp56800系列中的dsp56f807作為核心處理器,該晶元集合了單片機和數字信號處理器的優點,既具有強大的運算能力,又具有強大的控制能力,性能較強,價格也比較適當。
  13. The radar signal simulator discussed in the thesis is a part of an arm signal processor. the main usage of the simulator is supplying data to test the efficiency of the arithmetic and the performance of the processor

    論文是基於反輻射導引頭信號處理器的研製展開的,模擬器的主要作用是提供數據以測試演算法的有效性及信號處理器的性能。
  14. 2, design and realization the data - path of armp processor. including arithmetic logical unit ( alu ), register files. shifter, multiplier and so on

    2 、對armp中數據通路的設計與實現:包括alu的設計、寄存器文件( registerfile )的設計、移位器( shifter )的設計、乘法器的設計等等。
分享友人