processor array 中文意思是什麼

processor array 解釋
處理機陣列
  • processor : n. 1. 〈美國〉農產品加工者；進行初步分類的人。2. （數據等的）分理者；【自動化】信息處理機。
  • array : vt 1 打扮，裝飾。2 使…列隊，排列。3 提出（陪審官）名單，使（陪審官）列席，召集（陪審官）。n 1 整...
  1. The array ' s processor can create radio beams pointing in other directions as well by performing more complex mathematical operations on the signals from the two antennas

    陣列的處理器也可以對兩個天線的訊號進行更復雜的數學運算，以便針對其他方向產生無線電波束。
  2. And when the array transmits back to the cell - phone user, the processor sends an out - of - phase signal to one of the antennas, generating a radio beam that runs from north to south

    當陣列發射訊號給行動電話用戶時，處理器會傳送一個異相的訊號到其中一個天線，產生由北往南的無線電波束。
  3. Because the processor is fast enough to perform this task many times a second, the array can continually readjust the radio beam as the cell - phone user walks or drives across the array ' s coverage area

    因為處理器的速度很快，可在一秒內執行多次工作，所以當行動電話用戶在陣列涵蓋?圍內行走或開車時，陣列可不斷重新調整無線電波束。
  4. To direct beams at users who are moving around, the processor must repeatedly solve the equations with constantly updated information from the antenna array

    為了讓波束能夠瞄準四處移動的用戶，處理器必須不斷更新來自陣列天線的訊息，並且重復進行解方程式的工作。
  5. A magnetic processor constitutes an array of logic gates, each of them programmable individually by the software

    磁處理器由邏輯閘陣列所組成，其中每個閘都可以由軟體獨立編程。
  6. Array transform processor

    陣列變換處理器
  7. The implanted array of electrodes is linked to the external speech processor through an antenna where electrically stimulated signals are transmitted to the brain, effectively passing on simulated hearing sensation to the hearing centre achieving

    植入的電極與體外的語言處理器以無線方式連接，能把外界訊息直接以電流剌激傳遞到腦部的聽覺中樞，產生模仿聽力的作用。
  8. In order to resolve the contradiction between real - time and arithmetic complex in the television tracking capture system, the paper designs the real - time target track processing system which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    摘要為解決電視捕獲跟蹤瞄準系統中系統的實時性與演算法復雜性之間的矛盾，設計了以高性能的dsp晶元tms320c6416為核心處理器，結合大規模可編程邏輯器件cpld進行邏輯控制以及現場可編程門陣列fpga對採集的視頻數字圖像做預處理的實時目標識別跟蹤處理平臺。
  9. The main contents of the paper are : i the relationship of the accurateness of calculation, complexity of calculation and hardware resources of the 5 - 3 dwt ; ii the basic theory of pci data transmission the controlling of the host to client and the data exchanging ; iii configuration of the video decoder saa7114h to implement the transformation of the analog to the digital image ; iv image acquisition, compression and transmission from the host to the acquisition board by the component of field programmable gate array ( fpga ), digital signal processor ( dsp ) with the controller of pci and video decoder saa7114h

    Pci的數據傳輸原理，外部主機如何控制從屬設備以及如何進行數據交換。配置視頻解碼器saa7114h ，實現模擬ccd攝像頭模擬數據到數字數據的轉換，實現採集的功能。用fpga 、 saa7114h和集成pci介面的dsp實現圖像的採集、壓縮以及從採集板到主機的傳輸。
  10. The real - time target track processing system is designed which is constructed by the high performance dsp chipset tms320c6416 as the core digital processor, the huge reprogrammable logic chipset cpld as the system logic control and the field reprogrammable array fpga as the image preprocessing chipset to sampled video digital image

    為了解決演算法復雜性及滿足工程實時性，設計了以高性能的dsp晶元tms320c6416為核心處理器，結合大規模可編程邏輯器件cpld進行邏輯控制以及現場可編程門陣列fpga對採集的視頻數字圖像做預處理的實時目標識別跟蹤處理平臺。
  11. An array of identifiers, as defined in winnt. h, for the processor types that are supported by the referenced assembly

    引用程序集所支持的處理器類型的標識符數組（如winnt . h中的定義） 。
  12. 2. by analyzing the partial discharge signals and the interferences and using high - speed filed programmable gate array ( fpga ) and digital signal processor ( dsp ), a hardware and print circuit board have been designed 3

    2 ）通過對局部放電和干擾的分析，針對局部放電信號實時處理的要求，利用高速的現場可編程邏輯器件和數字信號處理器完成了信號處理的硬體電路板的設計與製作。
  13. The models successfully map 2 - order iir filtering algorithm on processor array with 4 processing elements. during the process, a linear and nonlinear programming software - lingo is used to solve the model

    對iir濾波演算法在4個pe的處理器陣列上的映射建立了模型，並使用lingo規劃軟體進行了模型求解。
  14. This design can provide a high - speed path to a set of sharc parallel array processor. between this parallel processor and an analog signal acquisition module, the designed system can realize real time transmission

    本設計的目的在於為一套sharc并行處理陣列機提供高速的數據通道，使其能與模擬信號採集模塊進行實時的數據傳輸。
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