processor hardware 中文意思是什麼

processor hardware 解釋
處理機硬體
  • processor : n. 1. 〈美國〉農產品加工者;進行初步分類的人。2. (數據等的)分理者;【自動化】信息處理機。
  • hardware : 1 五金器具;金屬製品。2 (計算機的)硬體;(電子儀器的)零件,部件;(飛彈的)構件;機器;計算機...
  1. In soft, abnegating bald dos operating system, we will realize testing and displaying in real time on windows operating system. in hardware, we use computer as postposition cpu, monolithic processor as front cpu, and link them into simple network. in this way, we will realize a kind of distributing testing system providing with high precision and remote controlled ability

    軟體上,屏棄枯燥的D O S界面,使用windows平臺實現實時性很高的實測實顯任務;硬體上,將計算機作為上位機,單片機作下位機,連成簡單的網路,實現高精度的、具有遠程控制能力的一種分散式測試系統。
  2. The hardware of the ip phone codec to be designed is based on the fixed point digital signal processor ( ti ' s tms320vc5410 ) while the compression and decompression core in the software of dsp is based on the itu - t vg. 729a. ip phone codec carryout the task of collecting / playing - back. coding / decoding of speech signal and communication with embedded cpu. etc

    該語音編解碼器的硬體基於tms320vc5410 ,編解碼演算法遵循itu - tg . 729a協議,能夠實現語音信號的採集/回放、編碼/解碼以及同嵌入式cpu通信等功能,在8kbit / s的碼率下能夠提供獲得良好的語音質量。
  3. Then, i design a new signal processor basing on the development of hardware and the signal process of high frequency ground wave over - the - horizon radar

    接著,根據當今數字信號處理器件的發展和高頻地波雷達的信號處理過程,提出信號處理機的系統設計方案。
  4. The dissertation aimed at designing a new signal processor basing on the development of hardware and the signal process of high frequency ground wave over - the - horizon radar. after that, basal signal software of dsp, a important part of processing card, is designed

    本課題目的就是根據當今數字信號處理器件的發展和高頻地波雷達的信號處理過程,提出信號處理機的系統設計方案,然後對其中信號處理板中的主要處理部件dsp進行基礎軟體的開發。
  5. The development of fieldbus technology made lonworks field bus outstanding in all kinds of fieldbus. this paper simply introduces some kinds of common using fieldbus and the important position and influence of lonworks fieldbus in all kinds of fieldbus, carefully describes the technology core of lonworks technology, puts great emphasis on the introduction of the development and design of public security node of intelligent district which adopts computer, communication and control technology, carefully designs the interfaces of hardware circuits. the public security node of intelligent adopts 8031 single chip as its main processor to complete the application program of user, which mainly collects, process and control all kinds of field signal, and neuron chip 3150 as its slave processor to communicate with other nodes on field network, which works under parrel slave a mode

    現場總線技術的發展使得lonworks技術脫穎而出,本文簡要介紹了常用的幾種現場總線的概況以及lonworks技術在現場總線技術中的地位和影響,對lonworks技術的技術核心:神經元晶元、 lontalk協議、 lonworks收發器、 lonbuilder及nodebuilder進行詳盡的描述;重點介紹了集先進的計算機技術、通信技術、控制技術為一體的智能小區安防節點的開發與研製,對節點硬體電路的各種介面進行了詳盡的設計。本文設計的智能小區安防節點採用單片機8031作為主處理器來完成用戶的應用程序,主要負責對各種現場信號進行採集、處理及控制,工作在并行從a方式下的神經元晶元mc3150作為從處理器,主要完成與現場網路上的各節點及中心控制室之間的通信工作。
  6. Research of hardware implementation in fft ratl - time signal processor

    實時信號處理器的硬體實現研究
  7. Through researching the present mainstream ip set - top box hardware system, designed an ip set - top box system which based on the adi blackfin series dsp, and chose the bf561 processor as the system core processor

    本文通過對目前主流ip機頂盒硬體系統的研究,設計了一種基於adiblackfin系列dsp的ip機頂盒方案,並選擇了blackfin系列中的雙核處理器bf561為本系統的核心處理器。
  8. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中,採用高速的dsp處理器,實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓器配合的方法,實現了大電流信號的驅動輸出;採用485總線技術,組建了裝置主機與多探測器之間的主從式通訊網路,實現了多干擾條件下裝置主機與多探測器的可靠通訊;設計了差分式多級選頻放大電路,採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術,實現了控制器與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示模塊及鍵盤介面晶元,設計了人機信息交互的介面;採用了模塊化的軟體設計方法,開發了裝置主機及探測器的軟體程序。
  9. The hardware in this system includes a digital signal processor, an analogy input channel, a lcd, an analogy output path, a keyboard input part, a guard circuit and a logic control circuit

    該系統硬體包括數字信號處理器晶元、前向輸入通道、液晶顯示器、模擬量輸出部分、鍵盤輸入部分、保護電路部分和邏輯控制部分。
  10. 3 - d graphics on mobile phones is quite similar to 3 - d graphics on pc in years past. there is no hardware acceleration, and processor speeds are quite low, and there also is the lack of floating point arithmetic unit in mobile phones

    因此論文從通用的部分開始論述,然後明了移動平臺的特徵,並試圖解釋三維引擎的一般原理和設計一個具有粗適性的基於游戲的三維圖形引擎。
  11. The designed model is compiled into custom instruction of nios processor via sopc interface, and made up hardware accelerator interface model

    最後將該模塊通過sopc介面編輯成nios處理器的用戶指令,組成硬體加速器介面模塊。
  12. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design

    它遵照ieee - 1745 ( sparcv8 )的結構,針對嵌入式應用具有以下特點:採用分離的指令和數據cache (哈佛結構) ,五級流水,硬體乘法器和除法器,中斷控制器, 16位的i / o埠和靈活的內存控制器,具有較強的異常處理功能,新模塊可以輕松的通過片上的ambaahb / apb總線添加。
  13. It is comprised of short message processor and tfaas application. the former is concerned on software for at89c51 and other hardware which include fsk demodulation circuit soft keyboard circuit and so on

    簡訊處理器由89c51軟體和相應硬體組成,包括fsk解調電路、軟鍵盤電路等。 89c51軟體主要完成簡訊接收和分析並將採集數據進行發送。
  14. The hardware of the system is made up of p89c61x2ba as main processor, usbn9604 as usb interface, grating signal - processing circuit, xc95108 as signal subdivision, sensing, counter circuit and so on

    硬體部分以p89c61x2ba為控制核心,包括採用usbn9604介面晶元的usb介面電路,光柵尺輸出信號處理電路,以xc95108為主的信號細分、辨向和計數電路等。
  15. As the requirements of its function, a bus control interface board has already been designed. also the paper have provided the scenarios demonstration for the bus control interface board ( bcib ), the design for the protocol of communication, the hardware for bcib, the software for bcib, and the software for the processor ' s communication. while the analysis for the capability of real - time and the calibration and test for subsystem have been also finished. during the design, the system advanced ability, reliability, resources availability and the cost - efficency ratio are considered. the issus such as system integrated control, mutual exclusion of the shared storages, generation of handshaking signal and system self - test were resolved

    本論文主要對航空自衛系統的綜合化方式進行了深入研究,並按其功能等方面要求,對航空自衛系統綜合化總線通信模塊進行了設計,主要完成了總線通信模塊方案論證、通訊協議設計、總線通信模塊硬體設計、總線通信模塊( bcib )軟體設計、處理機通信軟體設計、實時性分析、系統調試、試驗等項工作,在設計過程中,綜合考慮了系統先進性、資源利用率、費效比及可靠性等因素;重點解決了系統綜合控制方式、共享存儲器互斥、握手信號產生及系統自檢測等問題。
  16. As network processor become core hardware in the next generation network device. the research in this paper is security of network information transmission based - on network processor

    因此網路處理器將成為下一代網路設備的核心硬體,本文的研究問題是基於網路處理器的網路信息傳輸的安全性。
  17. Ventilator, cooker, kitchen ware, food processor, table ware and hardware accessories, etc

    油煙機灶具熱水器微波爐廚房電器消毒碗櫃食品加工器械廚具炊具餐飲具等
  18. Secondly, the scheme of the management machine of power communication, whose hardware architecture is based on c32 digital signal processor ( dsp ) and software is based on real time operation system ( rtos ), is discussed. and also the possibility of realization of the scheme is demonstrated

    然後,給出了電力自動化通信管理機的設計方案,介紹了論文所採用的硬體基於c32數字信號處理器( dsp )和軟體以實時操作系統( rots )為平臺的方案,並論證其可行性。
  19. To bring a magnetic chameleon processor to market will require an interdisciplinary research effort that uses the combined skills of specialists in materials science and technology, hardware design and electronics, computer sciences, and mathematics

    要讓磁性變色龍處理器在未來可以打入市場,將需要結合材料科技、硬體設計與電子學、計算機科學以及數學等各領域專家的跨領域研究。
  20. Debugging in traditional embedded system is mainly by means of emluator and processor hardware debugger

    傳統的嵌入式系統的調試主要是通過軟體模擬的方式或是通過處理器硬體調試手段來完成。
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