risc cpu 中文意思是什麼

risc cpu 解釋
精簡指令集
  • risc : RISC,Risc,risc= reduced instruction set computer [computing] 【計算機】簡化指令系統計算機[精簡指令集運算]。
  • cpu : CPU ＝ Central Processing Unit 【自動化】中央處理機。
  1. And a risc cpu is also introduced

    並介紹了一個risccpu的結構與實現。
  2. The hardware platform in this paper is broadcom board and the cpu is motorola communication risc chip mpc850

    Uc os是面向中小型應用的、基於優先級的可剝奪實時多任務內核。
  3. The paper elaborates risc technology characteristic and 5 - stage pipeline architecture and function of the 64 - bit risc cpu, and dwells on 64 - bit vega cpu characteristic, and details the eda technology and the main flow of asic design, and elaborates the operation and exception process of the vega cpu and virtual instruction address " architecture and generation, and details cache architecture and mmu. the master dissertation dwells on virtual address translating into physical address, instruction cache finding address and instruction fetching, too

    詳細的闡述了64位vegacpu的特點，闡述了eda技術和asic設計的主要流程，闡述了vegacpu流水線結構、流水線操作、流水線暫停和異常處理，虛擬指令地址的結構和產生， mmu結構，包括指令tlb結構和虛擬指令地址向物理指令地址的生成流程， cache結構，尋址原理和指令的寫策略，指令高速緩存的尋址原理和結構，以及指令的獲取流程。
  4. At last, the paper involves the flow and related data of logic simulation, logic synthesis and test vector in the risc cpu

    論文最後給出了64位vegacpu的asic邏輯模擬文件和模擬波形，邏輯綜合策略、綜合腳本和綜合結果，以及vegacpu基於atpg的測試向量設計流程和相關數據。
  5. The samsung s3c44box cpu is 32 / 16 bit risc microprocessor and uses arm7tdmi core. its maximum cpu clock frequency is 75mhz. the s3c44box is used in fields of cheap price handle devices and industry applications

    Samsungs3c44box是32 / 16位risc微處理器，它使用arm7tdmi內核，最高頻率可達75mhz ，主要用於廉價手持設備和一般工業應用領域。
  6. In this dissertation, the hardware / software co - design flow and ac3 decoding algorithm is analyzed and the ac3 audio decoding on the virgo risc - core. then the extended instruction is added to lessen the cpu cycles used and to reduce the memory space used by the decoding program

    其次，本文在分析軟硬體協同設計流程和ac3解碼演算法以及risc核virgo上實現ac3音頻解碼的基礎上，擴展指令集增加特殊指令減少了ac3解碼的時間和解碼程序佔用的空間。
  7. At last, eda tools generate netlist for semiconductor manufactory. the eda technology and veriolog hdl must speed up the design of risc cpu in china

    高性能精簡指令集微處理器的設計通過運用veriloghdl語言， eda工具，和asic設計的主要流程，縮短了設計周期，加快其產品的面市速度。
  8. Today, the risc architecture is the single most common cpu type in use and is the basis for everything from workstations to cell phones, video game consoles to supercomputers, traffic lights to desktops, and broadband modems to automobile fuel - injection and collision avoidance systems

    現在， risc體系結構是惟一一種最通用的cpu ，它是很多平臺的基礎：從工作站到蜂窩電話，從視頻游戲終端到超級計算機，從交通指示燈到桌面系統，從寬帶數據機到自動加油站和防撞系統。
  9. This paper details the flow fetching the instruction of 64 - bit risc cpu and asic design flow. today, china had not been owned intellectual property of 32 / 64 - bit cpu

    本篇論文以64位risc微處理器為對象，詳細的闡述了在64位risccpu中指令的獲取流程和asic設計流程。
  10. Linux is an open and free operation system ; arm is an excellent 32 - bit risc cpu core, and most powerful embedded cpus are designed on the base of arm

    Linux操作系統是個開源、免費的操作系統， arm是當前全球領先的16 / 32位risc微處理器內核，現在大多數功能強大的嵌入式處理器都基於arm內核構建。
  11. We own the hardware and software technologies for 32bit risc cpu, dsp and ethernet. and also only focus on voip chip professional network fabless design company for r d and manufacture in taiwan

    我們擁有32 - bit risc cpu dsp以及ethernet的軟硬體技術，是目前國內唯一專注于voip ic研發及生產的專業網路通訊ic設計公司。
  12. Since the mpeg - 2 decoding chip is a soc, 32 - bits embedded risc cpu core is used to decode the ac3 and ts bit stream. the risc core is also used to manage the different task in the chip and the video processing unit is realized in asic modules

    論文設計的mpeg - 2系統集成解碼晶元是一個soc ，該soc採用32位嵌入式risccpu核virgo進行音頻ac3和ts流解碼的計算任務，並承擔soc的管理；視頻解碼採用asic實現。
  13. It ’ s a 16 / 32bits risc cpu based on arm920t ip core, which is highly integrated and powerful. this cpu has a lot of peripheral interfaces and i / o ports, which will facilitate our system design. the asic ime6400 is a system level chip which supports the multi - channel mepg4 video / audio compression. in our design, it ’ s served as an video compression oriented co - processor working under the control of s3c2410x. s3c2410x will do the job of importing the other vehicle traveling data such as analog and switch signals

    在筆者設計的系統中， ime6400作為專門進行數字視頻信號壓縮的協處理器，與s3c2410x協同工作，完成視頻信號的獲取，壓縮等工作;同時利用晶元的片內外設（如ad轉換器和i / o口） ，完成汽車行駛過程中開關量和模擬量的獲取和存儲，以滿足一個記錄儀的基本功能需求。
  14. In the process of selection about cpu, i compared several projects, and select the project of " mcu based risc technology " to research. the project apply the mpc555 chip of motorola company. and emphasize to research the application of spi and canbus. 4. as the part of the hardware platform, the i / o model block is researched, and some new hardware design and selfchecking measure applied in it

    3 .在邏輯運算模塊中，對保護cpu提出了幾種方案進行了比較，本文採取了"基於risc （精簡指令集結構）技術的微處理器"方案進行研究，該方案採用的是motorola公司的mpc555晶元，並重點對spi （串列外圍介面）和canbus現場總線在硬體平臺中的應用進行了探討。
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