sampling scheme 中文意思是什麼
sampling scheme
解釋
抽樣方案-
Average production length ( apl ) is introduced as the criterion for measuring control scheme performance. a model is developed with sampling rate and maximum false alarm rate as inputs to determine the optimum subgroup size and control limits as measured by apl
本文以平均運行長度（ apl ）為衡量控制圖有效性的標準，以抽樣比例和最大可接受錯誤報警率為輸入，通過建立模型的方法，確定最佳的樣本容量和控制線參數。 -
Admissibility of strict ps sampling scheme in class of unequal probability sampling scheme without replacement
抽樣方案在不放回不等概率抽樣方案中的可容許性 -
Design of measurement and sampling inspection scheme for quantitative packing products
定量包裝中計量抽檢方案的設計 -
In this thesis, the critical components of pcs are analyzed and tested in detail. i present the scheme of reliability qualification test of capacitors, furthermore, analyze the sampling inspection scheme theoretically for capacitors and put forward the proposals to improve this scheme. for most of components in pcs with high reliability or long lifecycle, which need great investment of time and material for their reliability tests, this paper provides a new and effective statistical method for this kind of components - the progressive stress accelerated life testing with exponential distribution
可靠性試驗也是可靠性工程的重要組成部分，能源系統許多元器件為高可靠性、長壽命器件，且大部分是非標準器件，為保證整個系統的可靠性，必須對備選元器件進行可靠性試驗，本文對能源系統關鍵器件進行了詳細的試驗分析，給出了電容器的鑒定試驗方案，對其抽樣試驗方案進行了理論分析並給出了方案改進建議。 -
This thesis discusses the pulse doppler ( pd ) weather radar signal processing system including digital intermediate frequency ( if ) receiver, especially on the application of if sampling and digital demodulation technique in pd weather radar signal processing system, the influence of amplitude and phase unbalances of in - phase and quadrature channels on weather radar echo spectrum estimation, ground clutters elimination algorithms and a typical engineering realization scheme of pd weather radar signal processing system
本論文研究的是採用數字中頻接收技術的脈沖多普勒氣象雷達信號處理系統，重點研究了中頻采樣及數字解調技術在脈沖多普勒氣象雷達信號處理系統中的應用、正交雙通道幅相不平衡對氣象回波譜估計的影響、地雜波濾波演算法，以及脈沖多普勒氣象雷達信號處理系統的具體工程實現。 -
This dissertation adopts a universal digital ds / dmpsk modulation and demodulation scheme which is based on fpga. this scheme adopts quadrature balanceable modulation, intermediate frequency sampling, digital matched filtering, delay differential demodulation techniques and so on. it directly processes the digital signals on intermediate frequency without down - conversion, and doesn ’ t need pseudo random codes synchronization and carrier wave extraction circuits
本文採用了一種基於fpga的通用數字調制解調方案，該方案在調制端採用了正交平衡調制技術，在解調端採用了中頻帶通采樣、數字匹配濾波、延時差分解調等技術，直接在中頻上進行數字信號處理，不需要進行下變頻，也不需要增加額外的偽隨機碼同步捕獲和載波提取電路。 -
Firstly, the theory basis of if digital receiver is introduced, which includes over - sampling digital mixing receiving scheme and mathematic model with which the scheme is proved correctly. secondly, the numerically controlled oscillator ( nco ) is designed and realized
首先介紹了中頻數字接收機採用的過采樣數字混頻數字接收方案，然後給出數學模型，從理論上論證了該方案的可行性;二、數控振蕩器設計與實現。 -
The light route used by measuring instrument determined its volume, according to the place between sampling area and lens, with the application background limits, the miniature atomized particles size measuring instrument takes scheme that the sampling area locate in front of the lens and the optic - electronic sensor at the back focal plane of the lens. the miniature atomized particle size measuring instrument employs
測量儀器採用的光路直接影響儀器的結構尺寸，接收透鏡和采樣區位置的關系具有不同的配置方案，由於霧粒粒徑測量儀應用背景的限制，所採用的光路配置方案是被測顆粒位於透鏡前方，光能接收器件位於透鏡后焦面上。 -
As to phased array receiving, a scheme of separating the delay clock and sampling clock is explicated, which effectively enhance the phased receiving delay resolution
對于相控接收延時，本文闡述了一種將延時時鐘和采樣時鐘分離的方案，有效地提高了接收延時解析度。 -
The relevant transactions include data sampling, graph display, saving, alarm, and default handling, etc. the scheduling scheme in rtdbs adopts the static table - driven scheduling assisted with the other scheduling to meet the need of timing limitation of real - time affair
相關的事務主要是數據採集事務、圖形顯示事務、存盤事務、報警事務、事故處理事務等。實時數據庫的調度策略根據組態軟體通訊特點採用靜態表驅動為主其他調度策略為輔的調度方案。 -
This master degree thesis, based on the observing of developing actuality of on - site electrical apparatus monitoring technology, aims at overcoming the problems existing in former on - site monitoring system, such as unable to realize multiple channels sampling and hold, unable to carry out multiple channel programmable magnification, unable to monitor frequency, low pick up bits, external rom low speed data saving, inefficient data query method, inflexible debugging and installation, low precision etc. by introducing eda ( electrical design automation ) technology, we put forward a creative circuit design scheme, which can considerable updated the on - site monitor system
本文根據電氣設備絕緣在線監測技術的發展現狀，針對以往在線監測數據採集系統存在的集成度低，不能實現多通路并行采樣，不能實現多通道同時程式控制放大，不能進行同步頻率監測，采樣位數較低，採用外部存儲器方式，對數據進行查詢的訪問方式，安裝調試不靈活等缺點，提出了應用現代微電子技術電子設計自動化（ eda ）技術實現對在線監測數據採集系統的改進。 -
Because of the structure of the traditional polarization diversity and combining scheme is too complex, after researching the polarization diversity and diversity combining technology, a new structure of receiver is proposed. in this structure the uniform sampling second - order dpll is used to remove the frequency bias after frequency discrimination
該結構控制較為復雜，為此結合實際項目要求，在研究了極化分集接收關鍵技術的基礎上，提出了一種改進的極化分集接收機結構，即在鑒頻之後利用均勻采樣二階數字鎖相環誤差傳遞函數的高通特性去除各種頻偏分量。 -
This paper divides into six chapters : the first chapter - base on the analyses of the origin, conception and development status of sr, this chapter discusses the key technology and realize difficulties of sr and advances the intention and meaning of the paper. the second chaptei - the sr system with radio frequency band - pass sampling architecture is a design scheme close to software wireless radio ( swr ), this chapter introduces three system architecture of sr system and analyses the theory of radio frequency band - pass sampling. the third chapter - this chapter analyses and designs the dsp hardware platform with radio frequency band - pass sampling architecture
本論文分為六章：第一章在分析軟體無線電的起源、概念、發展概況的基礎上，闡述了軟體無線電的關鍵技術及實現難點，提出了本論文研究的目的與意義；第二章射頻直接帶通采樣軟體無線電結構是接近理想化的軟體無線電設計方案，本章對軟體無線電系統的體系結構及射頻直接帶通采樣原理進行了分析；第三章分析並設計了射頻直接帶通采樣結構軟體軟體無線電系統的dsp硬體平臺；第四章研究了調制解調及信號調制樣式的識別演算法並給出了dsp實現，這是在dsp平臺上實現軟體無線電功能的一種常規方法；第五章分析了應用快速原型技術開發軟體無線電系統的必要性及可行性，完成了軟體無線電系統的matlab模擬及結合ti公司的tms320c6711dsk板的快速原型實現，這也是本論文提出的軟體無線電的一種新的研究方法。 -
The floating - point a / d conversion scheme was employed to increase the system ' s dynamic range. complex programmable logic device ( cpld ) was also used to perform the system ' s function such as data sampling trigger control and data storage control, etc. aduc812, a new type of microprocessor with full a / d converter, was utilized to fulfill the a / d conversion
在數據採集電路設計中，採用了浮點放大技術來提高系統的動態范圍；通過引入可編程邏輯器件來實現觸發控制、存儲控制；采樣過程中應用了時序重疊技術，從而實現了數據採集系統的流水線作業方式。 -
Under 0. 35um si - cmos process, considering the trade off of accuracy and speed in the adc, 2. 5 - bit were converted in the first stage of the pipeline. using the improved calibration scheme and full difference structure and bottom - plant sampling technique to reduce the errors of the 10 - bit ( 2. 5 + 1. 5 5 + 3 ), 100msample / s pipeline adc
在0 . 35 m工藝水平下，通過折衷考慮提高系統線性度和降低功耗的要求，將流水線第一級精度取為2 . 5位，採用改進的冗餘位演算法，並結合全差分結構，下底板采樣等技術對一個（ 2 . 5 + 1 . 5 5 + 3 ）結構的10位100msample / s流水線adc系統進行校正。 -
The vxibus c - size and i, q channels are employed in this module design, and the sampling rate in each channel reaches 500mhz. the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ). the timing and logic function are fulfilled by fpga. after the disscusion of signal adjusted, the detailed scheme of this module design have been showed. in this design, there is much logic function design, and it is very strict with the hardware language program. so the basic flow of hardware program design and several very important methods of high speed logic function design, which is described by vhdl, are introduced. also, expatiated the inner modules structure of fpga for forepart circuit, the keystone and difficulties of the design. the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system, and it is very important. the timing simulating results of several pivotal modules are depicted. high - speed signal paths are terminated to match the characteristic impedance. the design undergoes integrity analysis and software simulation
在本模塊的設計中，有著大量的邏輯設計，對硬體語言程序的編寫要求比較高，因此，文中介紹了硬體程序設計的基本流程，以及幾種基於vhdl硬體語言設計在高速邏輯設計中非常重要的方法。同時闡述了本模塊設計的前端fpga的內部模塊結構，設計的重點、難點，並給出了重要模塊的時序模擬結果。高速pcb的設計也是目前實現高速數據採集系統的難點和重點，文中詳細的闡明了高速pcb設計中的注意點，以及作者在設計本模塊時的經驗和心得。 -
Some properties of the generalized morphological transform provide the basis for establishing a new morphological sampling scheme for both binary and gray image
在廣義形態變換性質研究的基礎上所提出的廣義形態采樣方法，能更好地保留圖像的形態信息和邊緣信息。 -
The frame of quarters maintained by the census & statistics department ( c & sd ) was used for sample selection. the sample was selected from records of all permanent quarters and temporary structures in hong kong in accordance with a scientifically designed sampling scheme
調查採用的樣本，是以科學抽樣法抽取自政府統計處保存的屋宇單位框，抽樣范圍涵蓋本港所有永久及臨時構築物的記錄。 -
Data rate conversion technology for signal is one of the key technologies of wideband digital reconnoitering receiver. it is the feasible scheme to resolve the rate gap between the front end data flow of high speed analog digital converter ( adc ) sampling and the back end digital signal processor ( dsp ) processing
雙信號數據率轉換技術是寬帶數字偵察接收機關鍵技術之一，是解決寬帶數字接收機中前端高速adc采樣的高速數據流與後端dsp處理速度之間瓶頸問題的可行方案。
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