serial coding 中文意思是什麼

serial coding 解釋
連續編碼
  • serial : adj 1 連續的;一連串的;一系列的。2 按期出版的;(小說等)連載的;連續刊行的;連續廣播的。3 分期...
  • coding : n. 編碼;譯成電碼。
  1. We provide the structure and function of system software and hardware, discuss image attaining, division employee serial number from chest card image, then combine multiple characteristic and coding to recognize employee serial numbe, employee identity, and register check on work attendance

    文中給出基於胸卡識別的?勤系統的體系結構和功能,並詳細論述了圖像捕捉、胸卡和編號的分割、以及採用多特徵抽取和編碼器結合對編號進行識別的方法,進行職工身份識別,達到?勤的目的。
  2. The inversionless bm algorithm in rs decoder is implemented with serial mode, which avoids the inversion computation and only needs 3 finite - field multipliers. thus, the complexity of hardware implementation has been mostly reduced. a 3 - level pipe - line processing architecture is also used in the hardware and the coding circuit in rs coder is optimized by using the characteristics of the finite - field constant multiplier

    Rs解碼器的設計採用無逆bm演算法,並利用串列方式來實現,不僅避免了求逆運算,而且只需用3個有限域乘法器就可以實現,大大的降低了硬體實現的復雜度,並且因為在硬體實現上,採用了3級流水線( pipe - line )的處理結構。
  3. On the basis of designing the serial structure of mq encoder, parallel structure of mq encoder is designed using pipelining technique and the coding rate is approximately 1bit / cycle

    為了得到更高速率的mq編碼器,採用流水線結構設計了并行的mq編碼器。模擬結果表明mq編碼器的編碼吞吐量明顯提高,達到了硬體規模和編碼效率的平衡。
  4. This card largely depends on three integrate chips to fulfill its function : 1 ) nic control main chip, corresponding the mac sublayer of ethernet, to realize csma / cd media access protocol, manage the sending and receiving buffers integrated on the chip and provide motherboard pci interface. 2 ) serdes ( serializing and deserializing ) chip, corresponding pcs and pma sublayers in ethernet, mainly to complete 8b / 10b coding and convert 10 bits parallel data to serial data, and convert them again at the receiving end. 3 ) fibre transceiver unit, completing light - electrical conversion of seri

    該網卡主要由3塊集成的晶元完成其功能,分別是i )網路控制主晶元,對應于以太網的mac子層,主要完成csmaicd介質訪問協議,管理片上集成的發送和接收緩沖區,並提供和主板p0總線的介面: b ) s rd s (串列解串列化器)晶元,對應于以太同的pcs和pma子層,主要完成sb lob編碼並將10位并行的數據轉換為串列數據,在接收端完成相反的功能:涌)光纖收發器,完成串列數據的光電轉換功能。
  5. 4. aimed at the reduction of bit rate and the improvement of speech quality, a serial of speech coding schemes are studied in a gradual refinement way, and an integrated coding scheme at 1. 5 - 2. 4kbps is presented finally

    圍繞編碼位率的降低和語音質量的提高,以逐步求精層層遞進的方式研究了一系列壓縮編碼方案,並最終提出一個位率在1 . 5 2 . 4kbps的綜合編碼方案。
  6. Furthermore, we use the matlab simulation result to analyze the capability of viterbi decoding. finally, we complete the fpga designing of each module in the base - band processing unit, including parallel - to - serial conversion module, framing module, convolutional coding module in the sending end, serial to parallel conversion module, viterbi

    基帶處理單元各模塊的fpga設計主要包括發送端並串轉換模塊、成幀模塊、卷積編碼模塊、接收端串並轉換模塊和viterbi譯碼模塊,應用quartusii5 . 1開發平臺以及modelsim模擬軟體,給出了模擬結果。
  7. Detection and tracking moving targets in serial images is the mostly research field in computer vision and image coding. it also has applications in automaton navigation, video surveillance and monitoring medicine image analysis and video image compressing and transmitting

    序列圖像中運動目標的檢測與跟蹤是計算機視覺和圖像編碼研究的主要內容,在機器人導航、智能監視系統、醫學圖像分析以及視頻圖像壓縮和傳輸等領域中都有應用。
  8. Raster to use robots work space division, with the serial number identification grid, and the serial number as this robot path planning parameters of the code to shorten the length coding

    採用柵格對機器人工作空間進行劃分,用序號標識柵格,並以此序號作為機器人路徑規劃參數編碼,縮短了編碼長度。
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