sige 中文意思是什麼

sige 解釋
硅鍺
  1. Contrapose to the instability of the third - order charge - pump pll system, the loop optimization method is employed in system level design to decide the bandwidth and phase margin, therefore the loop bandwidth locates at the maximum phase margin to guarantee the stability of the system. according to tsmc 0. 35 m sige bicmos model, the sub - circuits in the designed pll and the whole system are simulated and verified by the cadence spectre

    5 .根據tsmc0 . 35 msigebicmos工藝模型,利用cadencespectre模擬軟體對所設計的電荷泵鎖相環路中各個模塊及整個系統進行了模擬模擬,模擬結果顯示,在1 . 5v電源電壓下,頻率為200mhz的參考輸入信號,輸出中心頻率為800mhz ,分頻電路採用4分頻,環路帶寬為10mhz ,捕獲時間大約為0 . 92 s ,功耗大約為15mw ,達到了設計指標。
  2. Hydrogenation of polycrystalline sige thin films by hot wire technique

    熱絲法氫處理多晶硅鍺薄膜
  3. Metal halide gas - discharge lamps possess the advantages of small sige, high luminous efficiency, long life good start quality, simply appending power supply. they are widely use in movie projectors and overhead projectors etc. the metal - halide gas - discharge lamps include metal halide lamps with dysposium iodide, mercury lamps metal halide lamps with scandium - sodium iodides and metal halide lamps with sodium - thal - lium - indium etc

    金屬鹵化物放電燈具有體積小、發光效率高、使用壽命長、啟動性能好附加電源較為簡單等優點,一般用於電影放映機、投影儀等儀器,品種有金鹵燈(汞燈) 、鏑燈、鈧鈉燈、鈉鉈燈等
  4. P - well si sige - based resonant tunneling diode dc parameters

    共振隧穿二極體及其直流參數提取
  5. 3. a 4. 2ghz vco tuned by an accumulation - mode mos varactor in tsmc 0. 35 m sige bicmos process is obtained after debugging with the simulator spectrerf

    3 .基於tsmc的0 . 35微米鍺硅bicmos工藝,採用spectrerf模擬器進行壓控振蕩器的調試和模擬。
  6. Here we take the strained si cap layer with relaxed sige layer grown epitaxially by uhvcvd to form nmosfet and relaxed si cap layer with strained sige layer to form pmosfet as comparison to bulk sample

    在論文中我們給出了兩種不同的材料結構來與體si材料進行比較,用應變的sicap層和弛豫的sige材料層構建nmos管,用弛豫的sicap層和應變的sige材料層構建pmos管。
  7. The hetrojunction device fabricated with sige material has shown great advantages over bulk sample in many aspects : higher carrier mobility, larger transconductance, stronger drive capability and hence faster circuit speed

    與體si器件相比,採用sige材料的異質結器件已經在許多方面顯示出了強大的優勢:譬如更大的載流子遷移率,更大的跨導,更強的電流驅動能力以及更快的電路速度等等。
  8. Strained - soi mosfet, which appears recently, takes both the advantages of soi ( silicon on insulator ) and sige ( silicon germanium ). it has shown advantages over bulk sample in enhanced carriers mobility, as well as higher transconductance, stronger drive capability and reduced parasitic capacitances. these properties make it a promising candidate for improving the performance of microelectronics devices

    Strained - soimosfet是最近幾年才出現的新型器件,它將soi材料和sige材料結合在一起,與傳統體硅器件相比,表現出載流子遷移率高、電流驅動能力強、跨導大、寄生效應小等優勢,特別適用於高性能、高速度、低功耗超大規模集成電路。
  9. Hole - sheet - density in sige pmos quantum well with - doping - layer

    量子阱溝道空穴面密度研究
  10. Unfortunately, though the lifetime control technology reduces the stored charge, it increases the forward voltage drop ( vr ) and the reverse leakage current ( i, ). therefore, si pin diode cannot realize a good trade - off in qs - vf - i, -. the appearance of sige material and sige / si hetero - junction technology has changed this situation

    但少子壽命控制技術在減少存貯電賀q _ s的同時,也增大了正向通態壓降v _ f ,和反向漏電流i _ r ,因此很難實現qs - v _ f - i _ r三者良好的折衷關系。
  11. Sige simox : oxygen ions with high dose were implanted into sige grown directly on silicon substrate for the first time, and sige - oi novel structure was formed successfully with additional high temperature annealing ; it has been confirmed that oxygen implantation with 45kev, 3 1017cm - 2 and annealing at 12500c in ar + 5 % o2 for 5 hours, are fit for the formation of sige - oi structure ; ge loss during the high temperature annealing has been observed, which is originated from ge volatility and ge diffusion ; it has been proposed to use nanoporous layer induced by h + / he + implantation to surppress ge diffusion and to use surface oxidation to overcome the upper limit of sige simox. sige smart - cut : hydrogen ions were implanted into sige material and followed by high temperature process ( 4000c to 7000c ) ; blistering study was done and suggested the possibility of sige layer transfer by smart - cut technology ; it is concluded that the bubble formation is easier in sige than in si, and the strain in sige / si and the difference of binding energy in sige and in si could possibly contribute to this effect. behavior of sige / si implanted with hydrogen : gave a detailed study on sige implanted by beamline or phi hydrogen implantation ; it has been found that great strain is introduced into sige by hydrogen implantation and this strain could be alleviated by high temperature annealing ; both for conditional beamline implantation and piii hydrogen implantation, 600 is appropriate for the post - implantation treatment

    Sige - simox工藝方面:首次採用硅( 100 )襯底上直接外延的100nm厚sige的樣品中注入高劑量的o離子,通過退火處理成功制備了sige - oi新結構,即sige - simox工藝,證實了以45kev注入3 10 ~ ( 17 ) 7cm ~ ( - 2 )劑量的氧離子,隨后在氧化層的保護下經1250 , ar + 5 o _ 2氣氛的高溫退火( 5小時)過程,可以制備出sige - oi新型材料;實驗中觀察到退火過程中的ge損失現象,分析了其原因是ge揮發( ge通過表面氧化層以geo揮發性物質的形式進入退火氣氛)和ge擴散( ge穿過離子注入形成的氧化埋層而進入si襯底中) ,其中ge擴散是主要原因;根據實驗結果及實驗中出現的問題,對下一步工作提出兩個改進的方案:一是通過在si襯底中注入適量h ~ + / he ~ +形成納米孔層來阻斷ge擴散通路,二是可以通過控製表面氧化來調節安止額士淤丈撈要表面sige層中的ge組分,從而部分解決sige
  12. 2 、 in order to solve the phenomenon of the outdiffusion of the base dopant, two solutions are suggested : 1 ) the sige : c base can effectively solve the outdiffusion problem ; 2 ) the undoped buffer layer can constrict the outdiffusion phenomenon

    2 、為了解決基區雜質外擴現象,提出了兩種方案: 1 )採用摻碳的sige : c基區層,能夠有效消除外擴問題; 2 )採用未摻雜的緩沖層i - sige ,能夠有效抑制外擴現象。
  13. Recent progress in sige materials and relevant bipolar devices

    材料及其在雙極型器件中的應用
  14. For designing the microwave power amplifier formed by the chip of sige hbt more accurately, an novel method to extract chip s - parameter from s - parameter of packaged device with package is proposed

    為了更精確設計由sige異質結晶體管( hbt )管芯構成的微波功率放大器,本論文提出了一種新穎的從管殼封裝器件的s參數中提取出管芯s參數方法。
  15. A study of sige si epitaxial layers growth at the low temperature

    類鐵電薄膜低溫外延層狀生長研究
  16. Based on the study of circuit cells which are applied in sige bicmos operational amplifier, the telescope cascode configuration is selected to realize high speed and high gain

    其次,通過對sigebicmos運算放大器中電路單元的研究,並結合運放實際設計指標,選擇套筒式共源共柵結構作為運放的主體結構以確保高速、高增益的實現。
  17. In this paper compensation method of wheel sige deviation is discussed in detail

    這里還詳細討論了砂輪尺寸誤差的補償方法。
  18. According to the tsmc 0. 35 m sige bicmos model, the circuit simulation is finished by the spectre in cadence

    根據tsmc0 . 35 msigebicmos工藝模型,利用cadencespectre模擬軟體對所設計電路進行模擬模擬。
  19. After structure design aimed to high transconductance, parameters of device structure are modified in detail. the simulation results of soi nmos with strained si channel show great enhancements in drain current, effective mobility ( 74 % ) and transconductance ( 50 % ) beyond conventional bulk si soi nmosfet. the strained - soi nmosfet fabrication process is proposed with lt - si ( low temperature - si ) technology for relaxed sige layer and simox technology for buried oxide

    其次,根據器件參量對閾值電壓和輸出特性的影響,以提高器件的跨導和電流驅動能力為目的設計了strained - soimosfet器件結構,詳細分析柵極類型和柵氧化層厚度、應變硅層厚度、 ge組分、埋氧層深度和厚度以及摻雜濃度的取值,對器件進行優化設計。
  20. In this article we present an easily implemented ( destructive ) method that is able to provide the ge concentration of the sige alloy at the desired depth resolution

    本文提供了一種簡單的執行(損傷的)方法,它可以在期望的縱向解析度下得到鍺硅合金的鍺濃度。
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