slave module 中文意思是什麼

slave module 解釋
從屬模塊
  • slave : n 1 奴隸。2 …的奴隸,耽迷於…的人 (of; to)。3 奴隸一般工作的人,苦工。4 【動物;動物學】奴隸蟻 ...
  • module : n. 1. 測量流水等的單位〈1秒100升〉。2. 【建築】圓柱下部半徑度。3. 【物理學】模,系數,模數,模量。4. 【無線電】微型組件;組件;模塊。5. (太空船上各個獨立的)艙。
  1. The design of each functional module, including the bridge selected module, mlb slave state machine, buffer, ahb master state machine, arbiter. 4

    各功能模塊的設計,包括橋選擇單元、 mlb從狀態機、緩沖區、 ahb主狀態機,仲裁器; 4
  2. Being master control part, user controller stores, manages, display and query user information ; as slave control part, sub - user controller calculates and temporarily stores power sent from measuring module ; measuring module measures electric energy by using power meter ' s special circuit which simplifies circuit design and connects or breaks up power supply circuit by relay ; in order to transmitting data fast and exactly, rs - 485 communication standard is adopts between user controller and sub - user controller

    主控部分用戶控制模塊可存儲、管理、顯示和查詢用戶電能信息;從控部分子用戶控制模塊計算並暫存電能測量模塊輸出功率數據;電能計量模塊採用電度表專用厚膜電路hdb6進行電能計量,簡化了電路設計,同時還利用繼電器控制連接或斷開用戶的供電迴路;在主從部分間採用rs - 485通信標準實現數據快速、準確的傳輸。
  3. The whole system is made up of 3 modules, they are serial communication module, embedded web server module and the remote operation interface module. serial communication module which is designed referring to modbus realize the communication between host computer ( embedded linux system ) and slave devices ( soot - measuration instruments )

    串列通信模塊主要實現主機(嵌入式linux系統設備)與從機(煙道粉塵測定儀)之間的串列通信,參考國際上流行的modbus協議設計了系統的串列通信協議,使系統更具開放性。
  4. First, for its disadvantages in dynamic networking, the separated structure of master and slave is merged. and a new bluetooth node structure which has the ability of dynamic role changing is got. second, for its insufficiencies in nodes controlling, we add a new module btextend above the bthost modual, through which can controll the bluetooth nodes behaviour flexibly

    首先,針對該模擬模塊中的藍牙節點結構無法支持網路拓撲動態創建的問題,將原架構下主節點和從節點分離的架構進行了合併,讓藍牙節點的架構能同時處理不同角色的模擬,從而得到了具備角色動態切換能力的藍牙節點體系結構;其次,針對該模擬模塊在靈活控制藍牙節點的介面方面存在不足,在原架構下的bthost模塊之上添加了一個可以靈活控制藍牙節點行為的新模塊btextend 。
  5. On account of actual demand, an ip core of 32bits / 33mhz pci interface module based on fpga has been designed by virtue of vhdl, and the 32 bits microblaze processor soft core has been embedded into this fpga. so, a fast and highly efficient pci master / slave interface, a local processor and other control logic are integrated on one chip of fpga

    根據實際需求,利用vhdl硬體描述語言設計了基於fpga的32位/ 33mhz的pci介面模塊的ip核,並內嵌xilinx公司的32位軟處理器核microblaze ,從而在一片fpga上就實現了快速高效的pci主從介面和本地端處理器及其他控制邏輯。
  6. Based upon single chip microcomputer of pic series, each module of communication of slave computer is structured

    同時,以pic系列單片機為核心,構建了各個下位機的通信模塊。
  7. The communication module sends wireless messages between master module and slave module

    通信模塊用於在主控模塊與從控模塊之間進行無線通信。
  8. The system consists of master module, slave module, communication module, eeg recording module and electrode module

    該系統由主控模塊、從控模塊、通信模塊、信號採集模塊和電極幾個部分組成。
  9. The slave module controls the recording module for channel selection, recording startup / end and sends the data to the master module

    從控模塊直接控制信號採集模塊,選取採集通道,啟動或停止採集,並將數據進行打包後向上級傳輸。
  10. In the hardware design part, the hardware design scheme of usb data upload and download modules, usb host and slave modules and fpga module is proposed ; the connection mode among these modules is also shown

    在硬體設計部分,給出了usb數據上傳和下載模塊、 usb主機和設備模塊及fpga模塊具體的硬體電路的設計方案以及模塊之間的連接關系。
  11. The products of the work go as followed : develope the uniform asi slave module, which could be linked with many kinds of sensors. the condition of slaves can be configured by the master. develope special transmitter for asi master, which needs only two control wires

    課題的研究成果有: ( 1 )開發了統一的asi從站模塊,可以接各種傳感器,從站的信息可以由主站來配置; ( 2 )開發了專用的asi主站傳輸控制器,只需要兩根控制線。
  12. Slave cpu receives the spwm data and output the spwm wave by query the spwm table. the dead time is generated by hardware to prevent the h bridge arm from short directly. the power out module is protected for over current, over voltage and over heat

    逆變器採用雙cpu結構,使用spi進行連接,主cpu完成輸入、輸出和spwm波形數據的計算,從cpu接收到spwm數據后使用查表方法輸出spwm波形,使用硬體電路生成死區時間防止橋臂直通,對輸出功率模塊進行了過流、短路、過壓、過熱保護。
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