three-chip design 中文意思是什麼

three-chip design 解釋
三晶元設計
  • three : n. 1. 三個人[東西]。2. 三歲,三時。3. 【板球】3字型。
  • chip : n 1 碎片,削片,薄片;碎屑;薄木片;無價值的東西。2 (陶器等的)缺損(處)。3 (賭博用)籌碼;〈p...
  • design : vt 1 計劃,企圖,立意要…。2 指定,預定;留給,留著。3 設計,草擬,擬定,籌劃;起草,畫草圖,打(...
  1. The paper introduces a method of design and realization that is based on the single chip computer 8051, which adopts straight line grating sensor and realizes the three - coordinate high accuracy system of dynamic check and displacement measurement of nc machine

    摘要介紹了一種以單片機8051為核心,採用直線光柵位移傳感器,實現數控機床三坐標位移高精度動態檢測系統的設計方法。
  2. The article consists of three parts mainly : the first part has described the method of detecting the faint signal, mainly include : detection technique of faint signal, principle of the optical fibre sensor, the little lose effects when optic fibre little curved, and the research of the stress sensor of optical fibre. the second part emphasizes on the design of the intelligent photoelectricity system, mainly tells the design of the circuit to process the faint photoelectricity signal, details the software and hardware design of intelligent photoelectricity system made of single chip microcontroller, led, man - machine interface, communication interface, etc. the third part is the network communication of the detection system, details the technology of single chip microcontroller how to group the network, and the communication between single the chip microcontroller system and the modem, and how to realize the data between the field and computer central exchanged through the existing public phone network

    文章主要分為三部分:第一部分論述了微小信號的檢測方法,主要包括微小信號的檢測技術、光纖傳感器的原理、光纖微彎損耗效應及光纖應力傳感器的研製;第二部分重點講述了智能光電檢測系統的研製,主要講述了微弱光電信號調理電路的設計及由前(后)向通道、單片機、 led 、人機介面、通信介面等組成的智能光電系統的軟硬體的具體設計;第三部分為檢測系統的網路通信部分,具體闡述了單片機系統間的組網技術、單片機和modem之間的通信及通過現有的公用電話網路實現遠程監控的技術,實現現場檢測系統與橋梁測控中心的數據交換。
  3. The basic principle of natural gamma - ray log is stated, the developing background, developing ways and developing situation of natural gamma - ray tools are introduced. the researching task of the paper is presented through analyzing the using situation and questions exsisted in inner natural gamma - ray tools, the researching work is started from three aspects, they are logging tool development, reliability design and reliability assuring methods, and the data processing methods, in the course of logging tool development, instrument indexes are presented based on the compatible property of sookbps telemetry system and environmental property, the analog measuring chanel and the interface circuit which realizing the compatible performance are designed according to the instrument mdexes. the detecto * design. the plateau property testing of the detector and the analysis of it ' s affecting factors are stated, the measuring property of the tool is discused, a new type of single chip microcomputer is selected when designing the interface circuit, and the laboratory experiments has fulfiled conmunieating standard signals between the interface circuit, the universal interface unit of sookbps telemetry system and also 500kbps telemetry system

    本文首先概要介紹了石油測井的基本概念、方法、條件、最新進展、以及應採取的研發對策,論述了自然伽瑪測井的基本原理,介紹了自然伽瑪測井儀的發展背景、發展歷程和發展現狀,通過分析國內自然伽瑪測井儀的使用情況和存在的問題,提出了本文的研究任務。研製工作從測井儀研製、可靠性設計與可靠性保障技術、數據處理方法研究三個方面展開,在測井儀研製過程中,根據500kbps遙傳系統要求的配接性能和使用環境特徵,提出了主要儀器指標,並根據這些指標,設計了儀器模擬測量通道和實現這一配接性能的介面電路;論述了探測器的設計、坪特性影響因素分析及其測試,探討了儀器的測量性能;在設計介面電路時選用了新型單片機晶元,並與500kbps遙傳通用介面單元rtu 、 500kbpa遙傳系統實現了室內配接。
  4. The chip is accomplished in the full cooperation with other team members, the author pays particular attention to the analysis of the whole chip architecture and three sub - block design : transconductance amplifier ( ota ), voltage reference and current reference. based on existed technologies, a new high order temperature compensated voltage reference and a creative current reference with high order temperature compensation are shown respectively. the author simulated all the sub - block and whole chip by hspice

    該晶元的設計是由小組成員共同完成,本人主要負責了總體電路的分析、聯合模擬驗證及以下三個子電路的設計: 1 、跨導放大器,詳細分析了bandgap跨導放大器輸入級的動靜態特性及其優缺點,並結合系統要求,設計了一種與cmos工藝相兼容、可替代bandgap跨導放大器的低壓共源共柵跨導放大器。
  5. The control nuclear of this system is base on the single chip micro - comupter, and use the fuzzy control, transform the dc voltager - stabilzed power supply based on simulate component into a digital one. in this paper, it discussed the theory of three - phase half control ; design the fuzzy controler ; used the fuzzy control in this system

    由於目前的直流電源櫃由模擬電路實現,硬體電路復雜、元器件易老化、存在溫漂和抗干擾能力差的缺點,因此提出了單片機模糊控制晶閘管直流調壓系統的課題,對直流電源櫃進行改造,支持電站系統的工作。
  6. Circuit design is the basis of design of demultiplexer. speed, power and chip area are the main factors that should be considered in circuit design. every circuit structure has its merits and drawbacks, e. g. cmos logic family has a slower speed, but lower power, smaller area, scfl ( source couple fet logic ) family has a higher speed, but higher power, larger area. we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors. flip - flop is the fundamental element of demultiplexer, setup time and hold up time are key factors, which influence the speed of circuit, thus the design aim is how to reduce them. in this thesis we place emphasis on the design of scfl latches

    速度、功耗、面積是電路設計要考慮的主要因素,不同的電路形式具有不同的優缺點,如cmos互補邏輯電路功耗低,面積小,速度相對較慢; scfl (源極耦合fet邏輯)電路速度高,功耗和面積較大。所以要針對具體設計需要選用適當的電路形式或其組合結構,以滿足設計要求。觸發器是分接器的基本組成單元,建立時間和保持時間是影響電路速度的關鍵,所以減小建立時間和保持時間是觸發器設計的主要目標,本文著重介紹了scfl鎖存器的設計和優化方法。
  7. This paper is focused on the study and design of three - phase cycloconverter which is related to these technologies : computer control, semiconductor converter, ac velocity adjustment, single - chip computer application and the computer simulation

    本文通過應用計算機控制技術、半導體變流技術、交流調速技術和計算機模擬技術,設計了一個基於16位單片機的三相交-交變頻電源裝置。
  8. Chapter one summarizes the main content and the significance of the research ; chapter two introduces pci bus and 1553b bus in detail ; chapter three gives a general presentation of the design principle and introduces the pci bus interface chip s5920 and 1553b bus protocol chip bu - 61580 in detail, which make a basis for the hardware and e software design in the following chapters ; chapter four shows how to design the board " s hardware by using pci bus interface chip s5920 and 1553b bus protocol chip bu - 61580 ; chapter five deals with the concept and design method of vxd ( virtual device driver ), as well as the communication method between the user " s application and the device driver ; the last chapter, chapter six mainly puts forward some suggestions on how to improve the system

    在第一章概述了本文的主要研究內容以及本課題的意義所在;在第二章分別詳細介紹了pci總線和1553b總線,在第三章從總體上介紹了系統的設計思路並分別詳細介紹了pci總線介面晶元s5920和1553b總線協議晶元bu - 61580 ,這些內容為第四章硬體設計和第五章軟體設計作了鋪墊;在第四章具體說明了如何利用pci總線介面晶元s5920和1553b總線協議晶元bu - 61580來進行介面板的硬體設計;在第五章說明了虛擬設備驅動程序( vxd )的概念和設計方法,同時也介紹了用戶應用程序的設計過程及其與驅動程序間的通訊方法;在最後一章總結了本文的工作並對本設計的改進工作提出了幾點建議。
  9. Together with the facts in chapter 3, the hardware microprocessor system that made by dsp chip of ti corporation is used to process the sample signal. hardware circuit design is divided three parts

    論文第三章結合鋁箔生產現場的實際情況,選取ti公司的dsp微處理器晶元構成硬體電路的微處理系統處理檢測到的信號。
  10. In this dissertation, an embedded video monitoring system based on network is studied deeply, and then implemented the hardware device drivers to the chip of the vweb company ’ s vw2010. the design is based on the mpeg - 4 technology and embedded linux. the first three chapters of the thesis are to study the video surveillance system ’ s current background, main hardware structure and the main functions of software molds

    本論文的重點:研究了網路視頻監控系統的基本硬體體系結構和軟體功能模塊,提出了一種使用晶元vw2010來實現視音頻硬編解碼的驅動程序設計方法,該設計基於當前最流行的mpeg - 4編碼技術和開源的嵌入式linux操作系統;接著介紹了基於晶元vw2010的能兼容多語言的osd界面設計的幾個關鍵技術;論文最後給出了嵌入式linux下控制多種雲臺鏡頭的研究結果和設計方案。
  11. This is one kind project of hardware multiplexer based on the high - performance system on a programmable chip ( sopc ). in the project author integrate with the software and the hardware on a field programmable gate array ( fpga ), not only simplifying the overall system design, moreover realizing stably, high speed, low cost multiplexer ’ s design. the dissertation carry on three verification step that include function verification 、 time verification and prototype verification to guarantee each ip can work normally to satisfy the system performance requirement. then author introduce the realization of the multiplexer in detail, as well as the test and the debugging questions met in practice and solution of the questions

    本方案是一種基於可編程片上系統( sopc )的硬體復用器設計方案,其特點是將系統的軟體和硬體集成在一款現場可編程門陣列( fpga )上,使用該方案不但簡化了整個系統,而且實現了穩定、高速、低成本的復用器設計。對系統中各個功能模塊的整合和驗證採用功能模擬、時序模擬、原型驗證三個步驟進行,保證系統中各個功能模塊可以正常工作,並滿足系統的性能要求。然後詳細介紹了復用器的實現,以及測試和調試中遇到的問題及解決方法。
  12. Based on silicon - piezoresistive method, the paper first gives the theory of array silicon piezoresistive pressure, acceleration sensor, and the design of its incorporated chip, microstructure and out - circuit. several key techniques of making array silicon piezoresistive pressure, acceleration sensor such as 1c technic, mems ( silicon - silicon direct bonding, anodic bonding, anisotropic etching ) is also studied. minuteness engine machining, anode bonding etc. in the paper there are three ways which are examine - form, curve simulanting, to carry out sensors non - linear self - emendating ; adopt the several curves approaching and curve simulating to achieve the aims of sensor error self compensation, fusion technology etc. therefore, it providing referenced values of ways and directions for sensor system directing on

    論文首先以硅壓阻效應原理為基礎,討論了陣列式硅壓力、加速度傳感器的設計原理,並對陣列式硅壓力、加速度傳感器中集成敏感晶元(壓力、加速度) 、總體結構和壓力陣列的信號處理電路進行了設計,在陣列式硅壓力、加速度傳感器的研製中,還研究了半導體平面工藝、大規模集成電路技術、微機械加工技術(硅硅鍵合、靜電封接、各向異性腐蝕)等關鍵技術的應用。
  13. In the third chapter, the principles of randomizer and de - randomizer are illuminated, and the hardware realization is also given. the fourth chapter is focused on the design of ip ( intellectual property ) and the analysis of the principle of rs encoding and decoding. based on the theory of design reuse in soc ( system on chip ), this chapter is devoted to the design and implementation of rs decoder ip which can be implied in three hdtv channel decoder standard

    第四章首先介紹了ip的基本知識和設計流程,接著對rs碼的編碼和譯碼進行詳細的理論分析研究,提出rs編譯碼器實現方法,然後根據soc可復用設計設計思想,設計了一個應用於hdtv通道解碼的rs譯碼ip核,最後給出dvb - crs譯碼器的asic設計,並給出了其規模和性能。
分享友人