time signal clock 中文意思是什麼
time signal clock
解釋
報時鐘-
Electric - controller is nubbin in developping. we are based on designing to structure of circuit, we are dead against in time and stabilization for controlling and communications, precision and rapidity for transformation etc. we have completed to select on microprocessor, clock - frequency and a / d transfer. it carry out transformation for valve position signal, and select on solid - switch ac
在控制器的電路結構設計的基礎上，考慮到通訊、控制的及時、穩定、轉換的精度和速度等幾方面，主要完成對微處理器的選擇、時鐘頻率和a d轉換器的選用，閥位變送功能的實現，固態交流開關和顯示器的選擇等。 -
The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox
本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。 -
Let ' s set the clock by the radio time signal
咱們照著收音機的報時信號把鐘對一對。 -
( 2 ) both the circadian clock and the light signal may affect the circadian expressions of the mt1 and mt2 genes. the mt1 is more sensitive to variation with the structure of light and dark, but the mt2 is more affected by the time length of light exposure
光照對scn及淋巴細胞中鐘相關基因晝夜表達節律的影響中文摘要血和血的晝夜節律性表達同時受生物鐘及光信號的影響，但mt受光制構成的影響較大，而航2受光照時間長短的影響較大。 -
Gps is a planet wireless conductance system which is global and all - weather, gps can offer high precision time orientation information to infinite user, clock precision reachs 10 ? 6 magnitude 。 not only changes traditional time method of quartz crystal clock, but also replaces wireless shortwave and even more lowfrequency signal and tv signal whose overlay range is limited and low precision, offers advantage to geology field task, achieve automatization and high precision of seismic flow observation
利用gps授時信號全方位、全天候、連續性、實時性和高精度的特點，以gps信號為基準來校準本地時鐘（晶體振蕩時鐘或原子鐘） ，將gps接收機輸出信號的長期穩定度和恆溫晶振的短期穩定度相結合，應用大規模可編程邏輯器件，設計和實現了由pc104控制的實時在線授時系統。 -
Real - time power angle measurement of a synchronous generator based on gps clock signal and tachometer
時鐘信號的發電機功角實時測量方法 -
This logic is designed containing input signal delay, event type classification, event pre - scaling and timing logic and works in pipeline mode under control of 20mhz clock which ensures no dead time contribution
主觸發邏輯在20m時鐘下以流水線的方式工作，保證沒有死時間的產生。第二個例子是任意數字信號發生器的設計。 -
And a kind of 16 - step automatic selective programmable amplifying circuit is designed in volume resistivity measuring circuit, so as to handle sampling little and broad signal. the control and disposal system with the core of microchip at89c55wd is analyzed on chapter 4. main function unit such as the interface circuit of lcd display and keyboard, the interface circuit of micro - printer, real time clock ds12c887, and hardware anti - jamming technique are discussed
本文還設計了以at89c55wd單片機為核心的控制處理系統的外圍介面電路及其軟體，對主要功能部分進行了分析，主要包括：鍵盤液晶顯示介面及界面設計、微型印表機介面、實時日歷時鐘晶元ds12c887 、單片機與單片機及單片機與上位機的通信設計以及控制系統硬體抗干擾措施等。 -
There has to be some gap of clock cycles between the unblocking of signals and the next instruction carried by the process, and any occurrence of a signal in this window of time is lost
從消除信號阻塞到進程執行下一個指令之間，必然會有時鐘周期間隙，任何在此時間窗口發生的信號都會丟掉。 -
The paper compares some algorithms on rs decoding, makes improvements based on the me algorithm, removes the modifying step in decoding truncate rs code, corrects unsuitable statements in the related papers, and parameterizes the rs decoding module, reducing its area by 20 %. the paper overcomes the signal integration problem in multi - clock design, greatly lowers the phase jitter without area increase, introduces pll to adjust rate for the first time, and parameterizes the module
本文比較了實現rs解碼的幾種演算法，並在me演算法基礎上進行改進，創造性的去掉了縮短碼解碼中的校正環節，糾正了有關論文中的不當論述，並將rs解碼模塊進行了參數化設計，同時也將rs解碼的規模縮小了20 ；克服了多時鐘設計中的信號完整性難題，在沒有增加模塊面積的條件下，大幅降低數據的相位摘要抖動，首次引入鎖相環來調整速率。 -
Based on the basic principle of wavelet analysis, multi - resolution analysis of signal in atomic clock is made. the coefficients of wavelet transform for synthesis atomic time, which are weighed and averaged at different wavelet scales, are obtained. then according to reconstruction theorem, multi - resolution synthesis time scale can be reconstructed. since the signal of atomic clock has been analysed by multi - resolution, we can use wavelet variance at different scales to weight and average the coefficients. thus either the difference in stability of different clock or the varying characteristic of the same clock at the different scale are all considered. finaly, this method is checked by the measured data from national timing serve center of shaanxi astronomy observatory. it confirmed that this technique, which is simple and practicable, is a new method of multi - resolution. from this method, the common characteristic of different clocks can be extracted. the stability of multi - resolution synthesis atomic time scale is obviously superior to that of other methods
本文根據小波分析的基本原理，對原子鐘信號進行多解析度分解，將分解后的小波變換系數進行加權平均，得到不同小波尺度綜合原子時的加權平均小波變換系數，然後由小波變換的重構條件，反演綜合時間尺度.由於對原子鐘信號進行了小波分解，利用不同尺度的小波變換系數的小波方差進行加權平均，這樣既考慮不同原子鐘在穩定性方面的差異，又顧及同一臺原子鐘在不同小波尺度的變化特性.最後根據陜西天文臺國家授時中心的實測數據對這種方法進行了檢驗.表明這是一種全新的多解析度綜合方法，這種方法比較簡單而切實可行，它能提取各個原子鐘的共同特性，多解析度綜合時間尺度的平穩性明顯優于其他方法 -
In the time - domain, based on the principle of random sampling of dso. two way ( " time amplifing in dual slope integral " and " time - voltage convert " ) are implemented to measure the time between the system triger and writing clock. thus random sampling interpolate can be done to measure repeated signal in high frequency with the a / d convert and controller which frequency are lower
在時域，根據數字示波器隨機取樣原理，用兩種方法（雙斜率積分時間放大測量方法和時間? ?電壓轉換測量方法）測量數字示波器系統觸發和采樣寫時鐘間時間間隔，用低速a / d轉換器及控制器進行模?數轉換和控制，以此進行隨機取樣內插，從而實現了對高頻率重復信號的測量。 -
For simple applications one might simply have an real time clock interrupt signal a semaphore and have a process that encapsulates all the time dependent stuff
對簡單的應用而言，可以簡單地用實時時鐘中斷發送一個信號量並用一個進程封裝所有依賴時間的部分。 -
This paper gives a time - synchronization technique bases on gps time service signal which is used in broad band seismic recorder 。 by world coordination time offered by gps - - utc ( usno ), adjust local clock base on gps signal, gain high nicety clock signal, clock precision reachs 10 - 6 。 this clock is the time source of broad band seismic recorder, bring the whole seismic recorder works in same time base. 1pps time base with high stability can be used as in - phase, spring, time and start - stop of every collection mode, while the scale under second make a precise time mark to receive data of broad band seismic recorder
針對接收機中gps信號的噪聲進行kalman濾波軟體處理， kalman濾波可以對gps信號與本地晶振時鐘的時差數據在大噪聲中進行平滑，在較短時間內估計出高精度的時差數據。系統消除了gps秒脈沖信號的ms級隨機誤差，把晶振秒脈沖的長期穩定度鎖定到gps信號的穩定度上;在gps信號失效時給出了可行措施，能夠保證在任何情況下產生一個穩定、高精度秒脈沖信號，誤差在1 s內。 -
The research about the critical technique includes : developing the radiation - hard ccd sensitive to the x and euv ray ; implementing the design of ccd driving clock and signal readout electronic using cpld ; implementing shutter design which can realizing 1ms - 10s exposing time
關鍵技術突破包括：完成x射線和極紫外波段都敏感的抗輻照型ccd技術設計，並利用cpld實現了非規則像素陣列ccd的驅動時序和讀取電子學電路設計和調試：完成1ms 10s寬動態范圍快門裝置設計和調試。 -
At the same time, this paper presents packet recognition, transaction sequencing, sop, eop, reset, resume signal detection / generation, clock / data separation, nrzi data encoding / decoding and bit - stuffing, crc generation and checking ( token and data ), packet id ( pid ) generation and checking / decoding, serial - parallel / parallel - serial conversion
對同步模式的識別、并行/串列轉換、位填充/解除填充、 crc校驗/產生、 pid校驗/產生、地址識別和握手評估/產生做了具體的分析。 -
In addition, nodes in the system need be synchronized periodically to properly work, where dgps also plays an important role. the 1pps ( one pulse per second ) signal output from dgps provides an easy way to accurately time using an ordinary clock
此外，系統的各節點需要同步工作，而dgps接收機此時同樣起到了重要的作用，其輸出的秒脈沖（ 1pps ）信號使系統只利用一個普通的時鐘就實現了高精度的同步。 -
In the multi - module mode both trig signal and reference clock are used for synchronization. the functional module supports dma with the dsp, which frees the dsp ' s core processor and entitles the real - time digital signal processing
在數據傳輸方面無論是通過外部總線介面還是數據鏈路介面，功能模塊與dsp之間都支持dma方式，解放了母板處理器的核心運算單元，使實時信號處理成為可能。
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