transconductance 中文意思是什麼

transconductance 解釋
n. 名詞 【電子】互導,跨導。

  1. With the use of finite method we have developed computer simulation software for vacuum microtriodes with wedge - shaped and cone - shaped cathode on the basis of stduying deeply the field emission theory of vacuum microelectronics. the software included field section, grid point numbering, and the calculation of electric currents, transconductance and cathode capacitance, moreover, it can simulate the properties of vacuum microeletronic with variant structures and sizes. the relationship was studied and simulated among electic properties and device structures, sizes and cathode materials etc. the optimized design of vacuum microtiode was proposed

    本文在深入研究真空微電子器件場致發射理論的基礎上,根據圓錐形、楔形陰極真空微電子三極體的不同特點,分別建立了物理和數學模型,在考慮空間電荷密度影響的前提下,以有限元法為基礎採用迭代的方法計算出真空微電子三極體內的電勢分佈情況,繪制出了等勢線、電子軌跡線,並得到了器件電學性能隨幾何參數的變化情況。
  2. A complementary input stage, which consists of a p - channel pair and a n - channel pair, was used in the circuit, so that the common mode input range can extend from rail to rail. a dcls is used to shift the n - transistor curve leftward to overlap the p - transistor curve properly and keep constant transconductance in the whole common mode input range

    輸入級採用pmos差分輸入對和nmos輸入差分對並聯的結構,從而實現共模輸入范圍擴大到電源的正負兩端,並且通過兩個源級跟隨器平移nmos輸入管跨導曲線,使nmos輸入管和pmos輸入管跨導曲線的適當交疊,從而保持了這個輸入級的跨導在整個共模輸入范圍內保持恆定。
  3. The factors limiting the frequency band of the wide - band amplifier are introduced. through analyzing the effects of the intrinsic parameters and parasitical on the frequency characteristics, a method of improving fr of mosfet by using short channel device and making mosfet work at the saturation region through raising vgs is put forward ; the effects of different kinds of circuit configurations on the frequency characteristics and the junction voltage on the voltage pattern circuit, current pattern circuit and frequency characteristics are analyzed. according to the linear theory of transconductance which is applied in the bit circuit, the current pattern amplifier circuit, current transfer circuit and output circuit which consist of mosfet and the wide - band amplifier composed of them are put forward

    介紹了限制寬帶放大器頻帶寬度的因素,通過分析mosfet的本徵參數、寄生參數對頻率特性的影響,提出了採用短溝器件、使mosfet工作在飽和區、抬高柵源電壓等提高mosfet特徵頻率的方法;分析了不同電路組態對放大器頻率特性的影響、節點電壓對電壓模電路、電流模電路頻率特性的不同影響,根據應用於雙極晶體管電路的跨導線性原理,提出了採用mosfet構成的電流模放大電路、電流傳輸電路、輸出電路以及由它們所組成的寬帶放大器,獲得了良好的頻率響應。
  4. Operational transconductance amplifier

    運算轉導放大器
  5. Filter based on ota - c needn ’ t resistors, and the transconductance value of cmos - ota is relatively low

    最後還對模擬電路的版圖設計進行了總結。
  6. This incrementally changes the transconductance of the device, leading to a modulation effect

    這一效應會緩慢地改變元件的跨導,從而導致調制效應。
  7. Measurements of the electrical properties of transmitting tubes - measuring methods of transconductance and amplification factor

    發射管電性能測試方法跨導放大系數的測試方法
  8. Detail specification for electronic components. semiconductor integrated circuit - cf3080 type transconductance operational amplifier

    電子元器件詳細規范.半導體集成電路cf 3080型跨導運算放大器
  9. Three parameters, the fractional temperature coefficient, the sensitivity of transconductance to voltage supply and improvement factor, are introduced

    在分析中,本論文引入並使用了跨導的相對溫度系數、跨導對電源電壓的敏感度、跨導穩定性改善因子三項指標。
  10. If you need a programmable dynamic current source, find out about operational transconductance amps. most of the problem is figuring out when you need a programmable dynamic current source

    如果需要一個可編程的動態電流源,找出運算跨導的放大器,大部分的問題就明白了。
  11. Using a strained si layer as a channel in cmosfet may increase the mobility of carriers and thus enhance the device ’ s performance considerably such as transconductance and cutoff frequency

    在sige虛擬襯底上生長應變si層做器件溝道,將大大增加載流子的遷移率,從而提高器件的跨導和其他性能。
  12. Measurements of the electrical properties of electronic tubes. part 12 : methods of measuring electrode resistance, transconductance, amplification factor, conversion resistance and conversion transconductance

    電子管電性能的測量.第12部分:電極電阻跨導放大系數變頻電阻和變頻跨導的測量方法
  13. The innovation of the dissertation is indicated as follows : in the discussion of the ctrl _ gm sub - block, the transconductance stability of operational transconductance amplifier is deeply studied

    本論文的創新之處在於:在對ctrl _ gm模塊的論述中,論文對運算跨導放大器( ota )的跨導穩定性進行了較為深入的研究。
  14. The hetrojunction device fabricated with sige material has shown great advantages over bulk sample in many aspects : higher carrier mobility, larger transconductance, stronger drive capability and hence faster circuit speed

    與體si器件相比,採用sige材料的異質結器件已經在許多方面顯示出了強大的優勢:譬如更大的載流子遷移率,更大的跨導,更強的電流驅動能力以及更快的電路速度等等。
  15. Strained - soi mosfet, which appears recently, takes both the advantages of soi ( silicon on insulator ) and sige ( silicon germanium ). it has shown advantages over bulk sample in enhanced carriers mobility, as well as higher transconductance, stronger drive capability and reduced parasitic capacitances. these properties make it a promising candidate for improving the performance of microelectronics devices

    Strained - soimosfet是最近幾年才出現的新型器件,它將soi材料和sige材料結合在一起,與傳統體硅器件相比,表現出載流子遷移率高、電流驅動能力強、跨導大、寄生效應小等優勢,特別適用於高性能、高速度、低功耗超大規模集成電路。
  16. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究,分析了這些技術的工作原理和優缺點,在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時,為了使輸入共模電壓范圍達到軌至軌,不是採用傳統的差動輸入結構,而是採用了nmos管和pmos管並聯的互補差動輸入對結構,並採用成比例的電流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中,電流鏡負載並不是採用傳統的標準共源共柵結構,而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設計時,為了提高效率,採用了推挽共源級放大器作為輸出級,輸出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計,採用了帶電流鏡負載的差分放大器設計了一個基準電流源,給運放提供穩定的偏置電流和偏置電壓,保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  17. The chip is accomplished in the full cooperation with other team members, the author pays particular attention to the analysis of the whole chip architecture and three sub - block design : transconductance amplifier ( ota ), voltage reference and current reference. based on existed technologies, a new high order temperature compensated voltage reference and a creative current reference with high order temperature compensation are shown respectively. the author simulated all the sub - block and whole chip by hspice

    該晶元的設計是由小組成員共同完成,本人主要負責了總體電路的分析、聯合模擬驗證及以下三個子電路的設計: 1 、跨導放大器,詳細分析了bandgap跨導放大器輸入級的動靜態特性及其優缺點,並結合系統要求,設計了一種與cmos工藝相兼容、可替代bandgap跨導放大器的低壓共源共柵跨導放大器。
  18. After structure design aimed to high transconductance, parameters of device structure are modified in detail. the simulation results of soi nmos with strained si channel show great enhancements in drain current, effective mobility ( 74 % ) and transconductance ( 50 % ) beyond conventional bulk si soi nmosfet. the strained - soi nmosfet fabrication process is proposed with lt - si ( low temperature - si ) technology for relaxed sige layer and simox technology for buried oxide

    其次,根據器件參量對閾值電壓和輸出特性的影響,以提高器件的跨導和電流驅動能力為目的設計了strained - soimosfet器件結構,詳細分析柵極類型和柵氧化層厚度、應變硅層厚度、 ge組分、埋氧層深度和厚度以及摻雜濃度的取值,對器件進行優化設計。
  19. Using sige bicmos darlington configuration as the input stage, the input resistance is increased by the mos devices while the transconductance of sige hbts is maintained. in the same time, the equivalent input noise is controlled well because of the sige hbts ’ good noise performance in the input stage

    輸入級的設計採用sigebicmos達林頓結構,在保留sigehbt高跨導優勢的基礎上充分利用mos器件來提升運放輸入電阻,此外,基於輸入級中sigehbt良好的噪聲特性,運放的輸入參考噪聲電壓可以大大降低。
  20. Physics device model, component structure design and fabrication technology are discussed based on the thorough analysis of strained silicon and soi physics mechanism. the detail contents are as follows. the analytical threshold voltage model, drain current model and transconductance model are derived from poisson ’ s equation for the fully depleted strained soi mosfet

    本論文圍繞這一微電子領域發展的前沿課題,在深入分析應變硅和soi物理機理的基礎上,對器件的物理模型、器件結構設計和工藝實驗等問題作了研究,主要包括以下幾部分:首先,從器件的物理機制出發,建立主要針對薄膜全耗盡型器件的閾值電壓、輸出電流和跨導模型。
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