two-phase clock 中文意思是什麼
two-phase clock
解釋
二相時鐘-
The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox
本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。 -
The whole pwm circuit contains two subcircuit, the front - end is pwm module that make up of the counter that based on nine mosfet true - single - phase - clock d flip - flop ; the back - end is demodulated module, which is consist of a three order chebyshev low - pass filter used trans - conductor capacitor. all the subcircuits are simulated. at last, an approving simulated result of the whole circuit is given too
在調制部分，利用九管單相時鐘d觸發器構成計數器，並由此組成了脈沖寬度調制電路，同時給出了在典型溫度下的模擬結果;在解調部分，介紹了低通濾波器從無源到有源的設計方法，設計了三階切比雪夫低通跨導電容濾波器，同樣給出了相應的模擬結果;最後，作為將脈沖寬度調制電路和濾波器作為整體電路，以脈沖調頻波為輸入進行了模擬，取得了令人滿意的結果。 -
The difference clock delay match technology adjusts the two channel ad analog clock phase and implements the two way ad uniformly - space sampling
差分時鐘延遲匹配技術通過對兩路ad的采樣時鐘進行相位調整，實現了兩路ad的等間隔采樣。
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