vhsic 中文意思是什麼

vhsic 解釋
特高速集成電路
  1. The key to the fft algorithm is the design of butterfly computation and that of the address logic. the whole schema is designed in the top - down design flow and described in the vhsic hardware description language ( vhdl ), basing on these, we do our research on reconfigurable technology. the result indicates that the data processing ability of reconfigurable system improved greatly

    結果表明,可重構系統在數據處理能力方面比以往的系統有了很大的提高,本設計實現的fft重構處理器可工作於60mhz下,完成一個16點fft需要132個主時鐘周期,完成32點fft需要324個主時鐘周期,而且具有一定可重構性,可以方便地將其運算點數進行擴展,或將其他的圖像處理演算法在實時處理系統中實現。
  2. Vhsic - very high speed integrated circuit

    超高速集成電路
  3. Vhsic hardware description language and realization of data encryption

    與數據加密的實現
  4. An 8 bits scm was designed with vhsic hardware description language ( vhdl )

    課題採用硬體描述語言vhdl設計了8位單片機系統。
  5. To meet these requirements the system was designed as a custom digital logic component described in the standard hardware description language vhdl ( vhsic hardware description language )

    為了實現這些要求,本設計採用vhdl ( vhsichardwaredescriptionlanguage )硬體描述語言設計實現。
  6. This paper has used the hardware language vhdl ( vhsic hardware description language ) to program some special circuit and prepared some work for the system on chip ( soc )

    利用硬體描述語言將調速控制所需的一些電路綜合在fpga晶元上為電機控制器向片內系統( soc )方向發展做了一定的工作。
  7. Introduce the characters of fpga and vhsic hardware description language, design the fast walsh - hadamard transfer on the epf10k30 chip, analyze the problems brought by the improper parts of the program design and give the solution

    介紹fpga和vhdl語言的特點,設計快速沃爾什?哈達馬變換在可編程器件epf10k30晶元上的實現過程,並對軟體設計中的產生問題進行了分析,研究出解決的辦法。
  8. In view of numerous digital and analog signals need to be processed, and the difficulty of real - time processing of multi channel 400 hz ac signal, vhdl ( vhsic hardware description language ) is applied to design the digital circuit, which is successfully realized in field programmable gates array ic - xc2s100

    針對i o模塊中需要處理的數字量和模擬量較多的事實,以及多路400hz信號的實時處理較為繁重的現狀,作者採用了現場可編程門陣列( fpga )加以解決。
  9. On the base of it, a piece of data collection special chip with a core of fft is designed with vhdl ( vhsic hardware description language ) in the way of top down system design method, which can finish harmonic analysis and measure the voltage, current, frequency and power of the electric power system

    在此基礎上,使用標準的硬體描述語言vhdl設計出一個fft變換內核,並以該內核為核心、採取自上而下的系統設計方法完成了一個電力系統數據採集專用晶元的設計,實現對電力系統的電壓、電流、頻率、有功和無功功率等參數的測量以及各次諧波分析。
  10. The relevant program of both the dongle and the computer have also been developmented. a parallel port and a serial port are provided for the pcb. there is a program ( in vhdl, vhsic hardware description language ) carrying out in the pld which implementi ng the parallel protocol. an encrpt arithmetic is designed and embeded in pld. to providing a interface for the user, a dll ( dynamic link library ) is developmented in c + + builder

    所設計的電路板上可以選擇連接串列口或者并行口,在pld內用vhdl ( vhsichardwaredescriptionlanguage ,硬體描述語言)實現了並口的通信協議和一個自行研製的密碼演算法,並在c + + builder環境下開發了配套的上位機軟體,主要是提供了dll (動態鏈接庫)和一些函數用於pc機和加密鎖之間進行通信。
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