封裝晶體管 的英文怎麼說

中文拼音 [fēngzhuāngjīngtǐguǎn]
封裝晶體管 英文
packaged tra istor
  • 裝 : Ⅰ名詞1 （服裝） dress; outfit; attire; clothing 2 （演員的化裝品） stage makeup and costume Ⅱ動詞...
  • 晶 : Ⅰ形容詞（光亮） brilliant; glittering Ⅱ名詞1. （水晶） quartz; （rock） crystal 2. （晶體） any crystalline substance
  • 體 : 體構詞成分。
  • 管 : Ⅰ名詞1 （管子） pipe; tube 2 （吹奏的樂器） wind musical instrument 3 （形狀似管的電器件） valve;...
  • 封裝 : [半] package; potting; encapsulation; enclosure; packing; cladding; jacketing; encapsulating; pac...
  • 晶體 : [晶體學] crystal; vitrella; crystal body; crystalloid; x-tal
  1. For designing the microwave power amplifier formed by the chip of sige hbt more accurately, an novel method to extract chip s - parameter from s - parameter of packaged device with package is proposed

    為了更精確設計由sige異質結晶體管（ hbt ）管芯構成的微波功率放大器，本論文提出了一種新穎的從管殼封裝器件的s參數中提取出管芯s參數方法。
  2. Bipolar transistors of the type of 3dd820 and 3dd15d ( with f2 metal - pack ) are taken as an example in the study to verify the method of controllable junction temperature

    以3dd820 ， 3dd15d （ f2金屬封裝）雙極晶體管為實驗對象，對結溫可控的晶體管穩態工作壽命試驗方法進行了驗證。
  3. The transistor count is 3. 8 million ; the package is surface mount 240 - pin quad flat pack ( qfp240 ) ; and the die size is 98mm2 ; the most advanced research progress on microprocessor architecture is extensively studied to get technical preparations for microprocessor design

    該處理器目前正在進行後端設計，即將採用0 . 25 mcmos工藝流片，整個處理器的晶體管數目為380萬，封裝形式是qfp240 ， die面積為98mm ~ 2 。
  4. Detail specification for low power silicon n - p - n switching transistors - 65 v, planar epitaxial, ambient rated, hermetic encapsulation - full plus additional assessment level

    小功率硅p - n - p型開關晶體管詳細規范. 65v平面外延額定環境條件密封封裝.全面附加評定級
  5. Transistor electromagnetic induction aluminium foil sealer is a new type of container sealing equip, which is manufactured by bringing in the most advanced us transistor power module and with main elements and parts employed in original packing abroad

    晶體管電磁感應鋁箔封口機系列是新一代的容器封口設備。選用美國最先進的晶體管功率模塊，主要元器件原裝進口。
  6. . detail specification for low power silicon n - p - n switching transistors - 20 v, planar epitaxial, ambient rated, hermetic encapsulation long lead version - full plus additional assessment level

    小功率硅n - p - n型開關晶體管詳細規范. 20v平面外延額定環境條件密封封裝
  7. . detail specification for low power silicon p - n - p switching transistors - 65 v, planar epitaxial, ambient rated, hermetic encapsulation long lead version - full plus additional assessment level

    小功率硅p - n - p型開關晶體管詳細規范. 65v平面外延額定環境條件密封封裝
  8. Detail specification for low power silicon p - n - p switching transistors - 65 v, planar epitaxial, ambient rated, hermetic encapsulation - full plus additional assessment level

    小功率硅p - n - p型開關晶體管詳細規范. 65v平面外延額定環境條件密封封裝全面附加評定級
  9. Detail specification for low power silicon p - n - p switching transistors - 25 v, planar epitaxial, ambient rated, hermetic encapsulation - full plus additional assessment level

    小功率硅p - n - p型開關晶體管詳細規范. 25v平面外延額定環境條件密封封裝全面附加評定級
  10. Detail specification for low power silicon n - p - n switching transistors - 20 v, planar epitaxial, ambient rated, hermetic encapsulation - full plus additional assessment level

    小功率硅n - p - n型開關晶體管詳細規范. 20v平面外延額定環境條件密封封裝.全面附加評定級
  11. . detail specification for low power silicon n - p - n switching transistors - 65 v, planar epitaxial, ambient rated, hermetic encapsulation long lead version - full plus additional assessment level

    小功率硅n - p - n型開關晶體管詳細規范. 65v平面外延額定環境條件密封封裝
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