指令系統結構 的英文怎麼說

中文拼音 [zhǐlìngtǒngjiēgòu]
指令系統結構 英文
instruction set architecture
  • : 指構詞成分。
  • : 系動詞(打結; 扣) tie; fasten; do up; button up
  • : Ⅰ名詞1 (事物間連續的關系) interconnected system 2 (衣服等的筒狀部分) any tube shaped part of ...
  • : 結動詞(長出果實或種子) bear (fruit); form (seed)
  • : Ⅰ動詞1 (構造; 組合) construct; form; compose 2 (結成) fabricate; make up 3 (建造; 架屋) bui...
  • 指令 : 1 (指示; 命令) instruct; order; direct2 (上級機關對下級機關的指示) instructions; order; direc...
  • 系統 : 1. (按一定關系組成的同類事物) system 2. (有條理的;有系統的) systematic
  • 結構 : 1 (各組成部分的搭配形式) structure; composition; construction; formation; constitution; fabric;...
  1. The procedure functions in the compare between partial image of dynamic collection and corresponding image of the airscape. in chapter 5, basing on the analysis of correlative theory of digital image, we introduce the improved fasted - down algorithm and simulative anneal algorithm, which applies to nn calculation, an d bring forward the unique and effective means, correlative original value evaluation. basing on the combination of correlative arithmetic, a stable, high - speed and exact correlative arithmetic is formed, which makes it possible to apply computer vision detection of single - needle quilting in industrial production

    本文展開研究並取得一定成效:建了基於pci總線的微機實時圖像採集;在採集的布料總圖(鳥瞰圖)的基礎上,通過數字圖像的數字濾波、圖像增強、邊緣檢測等處理,提取布料圖像的邊緣,對輪廓的矢量化的象素點進行搜索,得到相應的圖案矢量圖,從而確定絎縫的加工軌跡,生成加工;在進給加工過程中,主計算機對動態局部圖像與總圖(鳥瞰圖)的對應部分進行圖像相關的匹配計算,應用數字圖像理論,合神經網路計算的改進最速下降法和模擬退火演算法,提出獨特而有效的相關迭代初始值賦值方法,形成穩定、高速和準確的相關運算,實現單針絎縫視覺測量和自動控制。
  2. On the base of analyzing the sparc instruction set, this paper researches the pipeline technology and the resolution of correlation problems, and these problems were resolved by using the harvard architecture, internal forwarding and delay branch technology

    本文在分析sparc的基礎上,研究了流水技術及其相關問題的解決方法,並通過在硬體上使用哈佛、提前寫寄存器的操作時間以及內部前推和延遲轉移等技術較好的解決了相關、數據相關和轉移相關的問題。
  3. This paper discusses msu ' s design, implementation and verification, implements the integration of the " longtengrl " system and studies the optimization of instruction cache

    本課題組設計的「龍騰r1 」微處理器晶元,與motorola公司的powerpc603e兼容,體自主設計。
  4. System calls. when an emulator ordinarily encounters a powerpc system call instruction, it emulates the exception by storing the instruction address into the srr0 register, setting some architecture - defined bits in srr1, and transferring control to physical address 0xc00. some powerpc variants allow more control over this behavior, but this is the traditional powerpc model

    當模擬器正常地碰到一個powerpc調用時,它便將地址存入到srr0寄存器,設置srr1中某些體定義的位,並將控制權轉交給物理地址0xc00 ,從而模擬這個異常(有些powerpc的變種允許對這種行為有更多的控制,但是這里的這種是傳的powerpc模型) 。
  5. Other differences lie in the instruction set, internal architecture, and control signals.

    其他差別是在,內部和控制信號方面。
  6. In this paper, using a top - down design scheme, the risc mcu ip core is divided into two parts : data path and control path. all the modules in the two parts are described by verilog hdl, a kind of hardware description language. the simulation and synthesis of the whole work are finished successfully with eda tools

    本文對pic16c6x單片機時序進行了分析,並且在此基礎上對精簡集mcuip核進行頂層功能和的定義與劃分,建立了一個可行有效的riscmcuip核模型本文將mcuip核劃分為數據通道與控制通道兩部分,採用asic設計中的高層次設計方法,使用硬體描述語言veriloghdl對這兩部分的各功能模塊進行了設計描述;利用多種eda工具對整個進行了模擬驗證與綜合。
  7. Once these changes ( dual mode, privileged instructions, memory protection, timer interrupt ) have been made to the basic computer architecture, it is possible to write a correct operating system

    一旦對一個基本的計算機體完成了以上修改(雙模式、特許、內存保護、定時器中斷) ,就有可能寫出正確的操作
  8. Plc, robot and cad / cam are called the three major pillars in the modem factory automation. plc, as the head of the three, has become the leading basic automatic equipment in the field of the industry control in the early 1980s " but as a matter of fact, plc being with the lack of friendly man machine interface, rnakes no close relationship between human and machineometimes it even can not be promoted and applied in some fields aiming at the situation mat those imported products are too expensive while domestic products are of rare famous brands, a plc man - machine interface - plc monitor is developedthis paper systemically introduces the developing procedure for the whole system, including how to design hardware and software system. especially emphasizing plc communication protocol. real time message accessing, lcd controller instruction set, definition of data construction for message & tag screens and how to display thern, assignment of internal resource of cpuealization in software among plc & manitor, file format defining a nd download of user data, etcplc monitor will compensate some weakpoints of plc, and extend the application rangeimultanneously enhance the performance of plc and increase the attached value of mechanical machines, undoubtedly it will see hight market prospect

    針對人機界面進口產品的高昂價格和國產品牌稀少的這一現狀,研製開發了一種plc人機界面? plc監控器。本文地介紹了整個的開發過程,包括硬體、軟體的設計及實現,重點介紹了plc通信協議,監控器的基本工作原理以及期望實現的功能,監控器電源電路、 sram存儲器掉電保護電路、 cpu監控器電路、按鍵輸入電路的設計及按鍵狀態的讀入,時鐘信息的設定與讀取, cpu液晶顯示器,信息畫面及標簽數據的定義及顯示方法, cpu內部資源的分配,監控器與plc通信的軟體實現,文件格式的定義以及畫面數據的下載等。 plc監控器彌補了plc一些方面的不足,可以擴大plc的應用范圍,提升機械設備的檔次,增加設備的附加價值,具有一定的市場前景。
  9. Finally, studies the instruction system of cos upon a dedicated instruction of smartcos - xc. chapter 4 discusses the smartcos - xc and gives the design and implementing of a smart card file system framework. based on this, this paper gives a simulation of head - end encryption of entitlement control message ( ecm ) and entitlement management message ( emm ), and implements the decryption of ecm and emm in the smart card

    在對通用cos的研究的基礎上,首先簡單分析了smartcos - xc ,合該cos ,論文針對有條件接收,按不同用途、不同類型分別設計並實現了存儲用戶授權及智能卡應用的文件體,通過該cos的,設計並實現了模擬前端授權控制信息( entitlementcontrolmessage , ecm ) 、授權管理信息( entitlementmanagementmessage , emm )數據生成模塊及用戶端ecm 、 emm解密模塊。
  10. Design the data path of the risc 51 ip core. emphasis on the arithmetic logical unit ; 3. design the control path of the risc 51 ip core to make the risc 51 ip core ' s instruction set compatible with mcs51 microcontroller ; 4

    ( 3 )設計risc51ipcore控制通路,實現risc51ipcore內部與原mcs51的完全兼容,具體設計原mcs51與risc51核的轉換過程,及正確的時序。
  11. After analyzing and comparing different partition rules, md32 pipeline architecture is finally defined, which meets the required instruction function, frequency and timing spec of md32. a complete set of creative design method for risc / dsp md32 micro - architecture is presented, such as parallel design, internal pipeline, central control, etc. thanks to the adoption of these design methodology, control path and data path are separated, circuit delay is reduced, and complex instruction operations are balanced among multiple pipeline stages

    它們將若干復雜操作均勻分配在幾個流水節拍內完成,實現了任意窗口尋址等復雜操作,將整個處理器的數據通路與控制通路分離,減小了電路時延,從而滿足了risc dsp不同功能和時鐘頻率的要求,成了一的、緊密聯的、協調的md32
  12. The fixed - point dsp program is given which are based on the analysis in the feather of the video signal and the 16 - bit fixed - point dsp - - tms320c5402. at last, the result and quantity of calculation are analyzed to prove that the speed and precision of calculation are matched to the system requirement

    在深入分析了線性調頻脈沖壓縮信號產生過程和特性的基礎上,合16位定點dsp ? ? tms320c5402的硬體的特點,編寫了定點dsp程序,並對程序的計算量和計算果進行了分析,表明演算法的速度和精度都可以滿足的要求。
  13. The target of this research project is to develop an 8 - bit risc microcontroller, which is compatible with picmicrotm mid - range mcu family of microchip technology inc. in the instruction system. the author and the team spent more than one year in this project. they abstracted logic schematic from layout, sorted the circuits into different modules, analyzed and simulated all the modules, and then they mastered the structure of mcu, understood the operation of instructions and grasped the design style of picmicro

    本文作者及其研究小組在一年多的時間里,從版圖的電路提取,電路整理,電路分析到電路的設計和模擬,做了大量的工作,深入的分析了pic16c73b的組成和工作原理,完全的破譯了picmicro的,把握了微控制器的設計思想,設計出了與pic中檔微控制器兼容的微控制器,為開發自我知識產權的微控制器奠定了堅實的基礎。
  14. Firstly, for the purpose of research and verification of multithread microprocessor, a superscalar microprocessor model armp - v2 is built on the basis of armp microprocessor ; secondly, the issue logic is not only the critical path in a superscalar microprocessor, but also critical to the performance of a multithreaded microprocessor with superscalar execution core

    首先,在設計的嵌入式微處理armp的基礎上進行改進,提出了一個超標量處理器模型,用於多線程處理器的研究與驗證。其次,發射邏輯是超標量處理器中的關鍵路徑,也是制約執行單元為超標量的多線程處理器主頻提高的關鍵因素。
  15. But this reduction of oop into sequential instructions is of no more concern to a system architect or a programmer than the actual assembler instructions executed for every operation

    但是這種oop向序列的歸和實際為每個操作所執行的匯編程序一樣,都不是設計師或程序員所關心的事。
  16. Text interchange on flexible disk cartridges ; file structure and character repertoire

    軟盤盒上的文本互換.文件和字元
  17. It is mentioned widely that cisc architecture has highly instruction consistency but risc architecture has efficiently instruction execute. on the design of the morden microcontroller, how to combine the two merit is one of the hotspots about the research of the system architecture

    眾多學者的研究表明, cisc代碼密度高的特點, risc執行效率高的特點,在現代微控器設計中如何合兩者的優點,是研究的熱點之一。
  18. This paper consists of five parts. the first chapter introduces the state - of - the - art of dsp and speech compressing technique. in the second chapter, dsp ' s characteristics, performance index, development tools of software, repertoire and hardware structure go into particulars

    本論文共分為五部分,第一章為緒論部分介紹dsp及語音編碼的發展現狀,第二章詳細介紹dsp的特點、性能標、軟體開發工具、及硬體
  19. This paper analyze the architecture of amex86 microprocessor, including the analyzer of instruction system, addressing mode, scheduling and clock of instruction, the integration and validation of amex86 architecture. this paper mainly discusses the design and realization of data path and instruction decoder in detail

    本論文將對amex86體的微處理器進行體分析,包括的分析、尋址方式的分析,時序以及時鐘拍數的分析和amex86的集成及驗證等。
  20. The features of instruction set architecture and application programs are the key factors to microprocessor architecture

    和應用程序的特點是決定微處理器體的關鍵因素。
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