指數寄存器 的英文怎麼說

中文拼音 [zhǐshǔjìcúnqì]
指數寄存器 英文
index register
  • 指 : 指構詞成分。
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 存 : 動詞1 （存在; 生存） exist; live; survive 2 （儲存; 保存） store; keep 3 （蓄積; 聚集） accumulat...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 指數 : 1. [經] （比數） index number; index 2. [數學] exponent
  1. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  2. On the base of analyzing the sparc instruction set, this paper researches the pipeline technology and the resolution of correlation problems, and these problems were resolved by using the harvard architecture, internal forwarding and delay branch technology

    本文在分析sparc指令系統的基礎上，研究了流水技術及其相關問題的解決方法，並通過在硬體上使用哈佛結構、提前寫寄存器的操作時間以及內部前推和延遲轉移等技術較好的解決了結構相關、數據相關和轉移相關的問題。
  3. Lcd will display wanted data by writing data to specified instruction register and specified data register through control bus and data bus, which makes operation easier

    只要通過數據線和控制線對指定的寄存器進行操作即可對想要顯示的數據進行顯示，開發起來很容易。
  4. Branch instructions using the contents of the link register or count register to specify the branch target address

    使用鏈接寄存器或計數寄存器來指定轉移目標地址的轉移指令。
  5. The part of execution in which an operand or instruction is read from main stora ge and written into a control unit or arithmetic unit register

    執行過程中的一個階段所需的時間，在此期間，計算機從主存儲器中取出指令或操作數，並將其存入控制器或運算器的寄存器中。
  6. The most common analysis is data dependence analysis, which is to determine the i tructio that use the variable ( register or memory location ) modified by another i truction

    最通常的分析是數據依存性分析，它用來確定指令使用的變量（寄存器或內存位置）是否被另一條指令修改。
  7. The most common analysis is data dependence analysis, which is to determine the instructions that use the variable ( register or memory location ) modified by another instruction

    最通常的分析是數據依存性分析，它用來確定指令使用的變量（寄存器或內存位置）是否被另一條指令修改。
  8. For the real time performance need of the low speed speech compress algorithm and the asic implement of the transfer process between programs, the design is put forward in the paper, in which state registers control the cross access between operator and memory, register windows are used for the parameters transfer, and the technique of hardware controlling is used to avoid pipeline conflict, so that the main problems of the transfer process in tr600 are solved effectively

    摘要針對低速率語音壓縮演算法對處理器系統實時處理復雜運算的性能要求，就程序調用過程的asic實現問題進行了對比與分析，進而提出了用層次狀態寄存器控制存取運算元對存儲體交叉訪問的方法，並結合運用寄存器窗口傳遞參數的功能，以及利用空指令硬布線處理流水線沖突的方法，有效地解決了tr600晶元中調用過程存在的主要問題。
  9. This includes initializing hardware registers, identifying the root device and the amount of dram and flash available in the system, specifying the number of pages available in the system, the filesystem size, and so on

    這包括初始化硬體寄存器、標識根設備和系統中可用的dram和閃存的數量、指定系統中可用頁面的數目、文件系統大小等等。
  10. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ，其它ram則利用微碼rom中的微程序進行測試，而微程序的運行則可以順帶覆蓋其它數據通路，從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計，除必備的幾條邊界掃描指令外，還提供了debug 、 runbist等指令以支持內部故障測試、在線調試及內建自測試;內部掃描採用部分掃描策略，選擇邏輯部件的邊界及用戶關心的系統寄存器進行掃描，從而實現了硬體邏輯劃分，方便了后續的測試碼產生和故障模擬，並為在線調試打下了基礎。
  11. Some variations of this instruction format use portions of the target and source register operand specifiers as immediate fields or as extended opcodes

    這一指令格式的一些變種使用部分目的和源寄存器操作數說明符作為立即欄位或作為擴展的操作碼。
  12. An option provided for most load and store instructions is to update the base register in other words, ra with the data s effective address generated by the instruction

    用指令生成的數據有效地址來更新基址寄存器（也就是ra ）是大部分加載和存儲指令的一個可選項。
  13. With software and hardware co - design method, this paper proposes an algorithm to calculate register lifetime in programs, and the control of writing results back into rf is implemented through an enable control signal provided by instruction encoding at compile time

    基於軟硬體協同設計的思想，在研究局部變量生存期演算法的基礎上，本文提出了通過編譯器指令編碼實現對硬體結構的使能控制，即控制流水輸出結果是否寫回寄存器文件，以減少對寄存器文件的寫次數，從而降低寄存器文件埠的讀寫壓力。
  14. That represents the value of an argument or local variable stored in two memory registers of a native frame

    獲取一個指針，該指針指向表示兩個內存寄存器中存儲的參數或局部變量值的
  15. To achieve this, an architectural power model for multi - port register - file is presented firstly. based this model, several practical optimization techniques are applied to reduce the power of register - file. the experimental results show that these techniques can reduce about half power of register - files in godson - 2

    並進一步提出通過減少偵聽浮點總線的項數以及減少指令立即數域的保存等方法減少發射隊列中相應部分的開銷，有效降低了面積和功耗; 4 .提出了物理寄存器堆的低功耗訪問方法。
  16. A design method based on the decomposition and multiplexing technique of complex instruction, combined the decoding arithmetic of instruction and a step counter together, sub - step realization method of multiclocks is proposed. the similarities and differences of architecture between fsm and multi - ? ocks are discussed from two aspects, timing and state space

    提出了執行周期復用的指令分解、指令寄存器與步長計數器聯合譯碼，以及多時鐘同步的控制流設計方法；進而從時間和狀態空間兩個角度深入討論了控制流設計中狀態機和多時鐘兩種常見體系結構的異同。
  17. In a typical cpu, a register called the program counter ( pc ) is used to keep track of which instruction is to be fetched next

    典型的cpu中，一種被稱為程序計數器的寄存器（ pc ）被用於跟蹤下一條被取出的指令。
  18. An application s roots include global and static object pointers, local variables and reference object parameters on a thread s stack, and cpu registers

    應用程序的根包含全局對象指針、靜態對象指針、線程堆棧中的局部變量和引用對象參數以及cpu寄存器。
  19. Some variations of this instruction format use portions of the target and source operand specifiers as immediate fields or as extended opcodes

    這一指令格式的一些變種使用部分目的和源寄存器操作數說明符作為立即欄位或作為擴展的操作碼。
  20. For each register we create a queue and the index of queue item means a function of executing time. the item in the queue is either null or an instruction whose operand is kept in this register

    該演算法利用寄存器隊列分析指令間的數據相關，能夠分析出指令間的所有寄存器相關，其特點是：數據流驅動；演算法簡單、實現效率高；并行成分的表示直觀。
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