採用哈佛結構 的英文怎麼說

中文拼音 [cǎiyònghāfójiēgòu]
採用哈佛結構 英文
harvard architecture
  • 用 : Ⅰ動詞1 （使用） use; employ; apply 2 （多用於否定: 需要） need 3 （敬辭: 吃; 喝） eat; drink Ⅱ名...
  • 哈 : 哈構詞成分。
  • 結 : 結動詞（長出果實或種子） bear （fruit）; form （seed）
  • 構 : Ⅰ動詞1 （構造; 組合） construct; form; compose 2 （結成） fabricate; make up 3 （建造; 架屋） bui...
  • 採用 : put to use; adopt; use; employ
  • 結構 : 1 （各組成部分的搭配形式） structure; composition; construction; formation; constitution; fabric;...
  1. Different from general microprocessors, dsps have harvard architecture or enhanced harvard architecture and units of dsps can work in parallel. to perform multiplication in high speed, dsps also include hardware multiplier in its cpu

    與通用微處理器不同，數字信號處理器採用了哈佛總線結構或改進哈佛總線結構，具有高度的并行性，為了快速完成乘法計算在cpu中增設了硬體乘法單元。
  2. The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length. the performance of mcu has been improved greatly by introducing single - clock - cycle instructions, setting multiple high - speed working registers and replacing micro - program with direct logic block etc. to keep the mcu core reusable and transplantable, the whole mcu core has been coded for synthesis in verilog hdl

    該mcu核採用哈佛結構、 16位指令字長和8位數據字長，通過設計單周期指令、在內部設置多個快速寄存器及採用硬布線邏輯代替微程序控制的方法，加快了微處理器的速度，提高了指令的執行效率。
  3. It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design

    它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。
  4. With the popular sources and models of static power fully discussed at first, the stack effect of transistor - level and logic - level cmos circuits are analyzed in detail according to the broadly adopted uc berkeley bsim model

    這是一款risc指令集的低功耗處理器晶元，它採用哈佛總線結構，兼容了avr指令集，具有4kb片內sram ， 128kbflash （暫時處于片外） ，除了
  5. Through adopting have ha the pic only flat machine of buddha structure, not only, have raised the ability of interference rejection with which systematic real time handles speed and has strengthened system ; when exceeding the speed limit, through adopting acousto - optic report to the police remind driver in time accurately will slow down to travel

    通過採用具有哈佛結構的pic單片機，不但提高了系統的實時處理速度而且增強了系統的抗干擾能力；在超速時，通過採用聲光報警及時準確地提醒司機要減速行駛。
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