時序計數器 的英文怎麼說

中文拼音 [shíxùjìshǔqì]
時序計數器 英文
sequential counter
  • 時 : shí］Ⅰ名1 （比較長的一段時間）time; times; days:當時at that time; in those days; 古時 ancient tim...
  • 計 : Ⅰ動詞1 （計算） count; compute; calculate; number 2 （設想; 打算） plan; plot Ⅱ名詞1 （測量或計算...
  • 數 : 數副詞（屢次） frequently; repeatedly
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 時序 : [地質學] sequence; sequential; time sequence; timing sequence; sequence in time
  • 計數 : count; tally; counting計數卡 numbered card
  1. Typically, the nonce can be implemented as a counter a sequence number or as a timestamp

    現時標志通常能實現為計數器（一個序列數）或者時間戳。
  2. Although many achievements have been acquired in oled structure material, production technology, drive methods, oled technology is just at the beginning, oled has given an equal chance for every company and country, and it is very important for our country to develop displaying technology of our own. the research direction of oled is managing to improve the device lifetime, at the same time found a perfect production technological flow and the global standard production mode. it is still a arduous mission that we want to live up to a batch production of oled displays in the future some years. active matrix organic light emitting diode ( am - oled ) adopts a circuit structure based on matrix addressing, and its driving circuit includes pixel driving circuit and peripheral driving circuit

    在文中，首先，分析和研究了有源oled的像素驅動電路，闡述了amoled顯示屏及其周邊驅動電路的結構和原理;其次，提出了qvga解析度的有源oled顯示屏列電極數據引線的分塊（ block ）方法，確定屏上驅動電路所需要的控制信號之間時序關系和幅值要求;最後，以fpga控制器的設計為核心，對外圍控制ic進行了具體設計，建立控制器電路模塊模型和演算法流程，通過quartus軟體對其內部的各個電路模塊進行綜合設計和模擬，得到了正確的模擬波形，完成了解析度為qvga （ 320 3 240 ）的amoled專用驅動電路的設計。
  3. In addition, make out in detail the design on inner combination logic and time logic of fpga, including series - parallel conversion, data selector, counter, flip - latch, timer, encoder, etc. at one time, not only pursuit flow of the data gathering system is illuminated, but also make use of in reason and effectively inner ram resource of fpga and build it in ping - pong framework

    另外，詳細的介紹了fpga內部的組合邏輯和時序邏輯的設計方案，包括串並轉換、數據選擇器、計數器、鎖存器、定時器、譯碼器等。並闡述了數據採集系統的工作流程，而且合理有效地使用了fpga內部的ram資源，將其構建成乒乓式結構。
  4. The value of the program counter when the logging guard clause is discovered in the analyzed code

    ：在所分析的代碼中發現日誌監護子句時，程序計數器的值
  5. Complex programmable logic device ( cpld ), usually used to develop asic, is widely used in digital system to accomplish complex combinational and sequential logic

    復雜的可編程邏輯器件（ cpld ）廣泛地用於數字系統中，常用作設計自己的專用集成電路，可實現復雜的組合邏輯和時序邏輯。
  6. In this article, based on theory of the rcm technology and exception - tree, the equipment - management programmer and the faulty category in dlpec ( dalian petro - chemistry corporation ) are discussed in details, and the equipment - management patterns for the enterprise are brought forward. for all kinds of equipments, some measurements on the maintaining and governing are established ; moreover, the system function mode structure is also schemed out, which responses the working situation of equipment in the enterprise in detail and is composed of equipment technology document - management, equipment document - management, equipment integrating - management, equipment maintaining - plan management, equipment stat. analysis management, integrating - query system etc ; at the same time, the whole system codes are devised, which include equipment category code, engineering planning sort code, spare part sort code, testing report catalogue code of pressure vessel pile, equipment stat

    本文以大連石化公司的設備管理程序和設備種類為研究對象，應用rcm的技術和故障樹原理，提出了具體的適合於該企業的設備管理模式；針對各種不同類型的設備，制訂出相應的維修管理對策；並運用信息系統分析與設計方法，設計出了比較詳細的、能真實反應企業設備工作狀態的系統功能模型結構，包括：設備技術文檔管理、設備檔案管理、設備綜合管理、設備維修計劃管理、設備統計分析管理、綜合查詢系統等；同時，設計出了比較完整的系統代碼，主要包括：設備類別編碼、工程計劃分類編碼、備品備件類別編碼、壓力容器管道檢驗報告目錄編碼、設備統計類別編碼等；另外，對數據庫設計、輸入輸出設計、系統的實施與測試等提出了比較具體的方案。
  7. The whole circuit ' s timing generation and synchronization was realized with cpld. as the channel of data transmitting, pof can isolate high voltage part and low voltage part efficiently. at the same time, a single chip processor was used to design a digital meter for the fiber current transducer

    系統採用cpld實現整個工作電路的時序發生和同步協調，利用光纖實現高壓部分和低壓部分的完全電氣隔離和實現信號傳輸，採用單片機技術實現混合式光纖電流互感器專用數字顯示儀表的設計。
  8. There is difference frequency measurement requirement for every part of pid regulating, difference between dynamic quality and static quality in response time and accuracy. according to these, it use the interrupt functions and high - speed counter of the simens s7 - 200 plc cpu226 basic unit and some peripheral circuit to measure frequency ; in software designed, the procedure frame of hydraulic - turbine governor and disperse process of parallel pid are analyzed, an improved pid algorithm is adopted to realize a pid regulation mode with variable structure and parameters ; the mechanical liquid - pressure system of the hydraulic - turbine governor is with electric - hydraulic converter unit of step motor. according to the drive character of five phase of response step motor, a variable frequency regulated voltage driver unit is designed in order to realize interface between plc and driver of step motor

    本文利用s7 - 200plc自身的特點設計了頻率測量單元，根據pid調節各個環節的特點，以及調速器動態特性、靜態特性對頻率測量的實時性和精度要求的不同，利用s7 - 200plc基本單元中內置的高速計數器以及相應的外圍放大整形、分頻電路，實現了水輪發電機組頻率的測量；在軟體上，對微機調速器的整個程序框架、並聯pid的離散化過程進行了分析，選用改進的pid演算法實現了變參數、變結構的pid調節模式；調速器的機械液壓隨動系統具有步進電機電液轉換元件，採用五相反應式步進電機，根據其驅動特性設計了變頻調壓驅動器，實現plc與步進電機驅動器之間數字介面。
  9. 4. complete the design of system ’ s logic function with fpga. the sdram ’ s controller and ping - pong operation is studied, and the data ’ s continuous storage is also realized. 5

    4 .設計實現系統的fpga邏輯部分，並研究了高速大容量sdram控制器和進行乒乓存儲操作邏輯時序，實現了數據流的連續傳輸。
  10. Although there have been many application instances in the field of input / output device technology, we need an specific project and technology route aimed at an given application. in this thesis, we combine the introduction and analysis of relative technology to describe the accomplishment of a coordinate collecting device which is based on incremental rotary encoder. this device is an specific device applied to collect the corrdinate displacement of ground image ’ s three - dimensional model created by full digital photogrammetric station. cpld chip and vhdl are applied in this device to carry out the following work : phase control of the electrical pulse created by incremental rotary encoder, counting the number of electrical pulse, controling the state of signal processing circuit, exchanging data between this circuit and pci control

    本文結合相關技術的介紹和分析，描述了一個基於增量式旋轉編碼器的坐標參量採集介面卡的實現，此介面卡是一種用於採集全數字攝影測量系統地面影像模型坐標位移量的專用設備，該設備採用cpld器件和vhdl語言實現增量式旋轉編碼器的脈沖信號鑒相和計數、信號處理部分的狀態控制以及和pci總線晶元ch365之間的數據交換和通信功能，同時該設備的驅動程序基於wdm模式，並且配置有結構良好的動態鏈接庫程序作為系統軟體和驅動程序之間的數據和控制交互中間介面，能夠方便地運行在windows98 / 2000 / xp操作系統平臺上，具有實時性強、工作穩定、通用性較好和性價比高等特點。
  11. According to the request of this subject, we have developed the system hardware and software for the slave device and the inspection software running on the pc. in this paper all of the followings is illustrated detailedly, such as the research on the principles of measurement and its realization, three means of water - level measurement that are separately based on photo electricity coder, pressure sensor and potentiometer ; selection of the microchip, we choose an advanced integrated soc ( system on chip ) microchip c8051f021 as the main controller ; realization of signal sampling, processing and its conversion in the mcu ; application of high precision 16 bits adc cmos chip - - ad7705 in our system, designing its interface with the microchip and relevant program ; using a trickle charge timekeeping chip ds1302 in the system which can provide time norm and designing of its i / o interface and program ; additionally, a 4 ~ 20ma current output channel to provide system check - up using ad421. in the system, ad421, ad7705 and the microchip compose spi bus ; to communicate with the master pc, here we use two ways which are separately rs232 and rs485 ; moreover, there are alarm unit, keyboard unit, power supply inspection unit and voltage norm providing unit in the system

    針對研製任務的要求，課題期間研製了下位機系統硬體和軟體，開發了上位機監控軟體，其中所作的具體工作包括：測量原理的研究和在系統中的實現，在本次設計中用三種方法來進行水位測量，分別是旋轉編碼器法、液位壓力傳感器法和可變電阻器法；主控晶元的選擇，我們選用了高集成度的混合信號系統級晶元c8051f021 ；實現了信號的採集和處理，包括信號的轉換和在單片機內的運算；高集成度16位模數轉換晶元ad7705在系統中的應用，我們完成了它與單片機的介面設計及程序編制任務；精確時鐘晶元ds1302在系統中的應用，在此，我們實現了用單片機的i o口與ds1302的連接和在軟體中對時序的模擬，該晶元的應用給整臺儀器提供了時間基準，方便了儀器的使用；另外，針對研製任務的要求，還給系統加上了一路4 20ma模擬信號電流環的輸出電路來提供系統監測，該部分的實現是通過採用ad421晶元來完成的，本設計中完成了ad421與單片機的spi介面任務，協調了它與ad7705晶元和單片機共同構成的spi總線系統的關系，並完成了程序設計；與上位機的通信介面設計，該部分通過兩種方法實現： rs232通信方式和rs485通信方式；系統設計方面還包括報警電路設計、操作鍵盤設計、電源監控電路設計、電壓基準電路的設計。
  12. This course consists of lectures and labs on digital logic, flipflops, pals, counters, timing, synchronization, finite - state machines, and microprogrammed systems

    本課包括了數字邏輯、觸發器、 pal （可編程邏輯陣列） 、計數器、時序、同步、有限狀態機、和微控制系統方面的講課與實驗。
  13. The measurement of the time interval of ultrasonic send wave and echo used the catch method of 52 series mcu, and avoided the error that the isr save the current value of counter

    超聲波發射波和回波的時間間隔的測量利用了52系列單片機的捕獲方式，避免了因為藉助于中斷服務程序來保存計數器的當前值所帶來的誤差。
  14. This counter resets to zero when an exception handler is entered, so nested exceptions show the handler - to - handler stack depth

    當進入異常處理程序時此計數器重置為零，因此嵌套的異常顯示處理程序到處理程序堆棧深度。
  15. Chapter 5 makes a converse - project analysis of a lcos chip which from a hmd product, for the reason that we can not get the chips ’ pin definition, the sequential and the electric properties documents. after measurement by oscillograph, then combined with the works above, we got the pin definition and the basic sequential properties

    通過示波器的測定及讀數統計，再結合上一章的演算法、時序計算結果和第二章對lcos技術的理解，得出了該晶元20個引腳的功能對應關系和基本時序特性。
  16. In signal processing circuit, the key of our study, based on methods of mcu + cpld and a / d converter, a time interval measurement unit is done, in which an isp cpld counter is carried out to judge laser pulse for controlling counting and offering signal of time series and control, and a count quantization error measurement circuit which main ramp circuit and 12 bits a / d conversion circuit guarantees the resolution of system

    信號處理部分是本文研究的關鍵，採用mcu + cpld的設計方法和模數轉換技術構成時間間隔測量單元的理論基礎，其中用可在系統編程的cpld計數器實現了對循環光脈沖的判斷以開關計數，並提供計數量化誤差測量電路相應的時序和控制信號，用斜坡電路和12位a / d轉換電路完成對計數量化誤差的測量，保證了系統的解析度。
  17. When creating a monitoring application, be sure to take this time lapse into account so that your code does not use an obsolete counter value

    創建監視應用程序時，請務必考慮這一時間間隔，以使您的代碼不會使用過時的計數器值。
  18. After a series of functional and time delay simulations, the design proved to be feasible and effective. the application indicates that the scheme is reasonable and the pxi - bus counter module meets the requirements of the design

    本文對pxi計數器的各項功能進行了功能模擬和時序模擬，並對其進行了調試和測試，測試結果表明:模塊設計方案合理、各項功能與指標均滿足設計要求。
  19. In the implementing of virtual machine, all p - instructions are encapsulated as classes. the virtual machine maintains the run - time environment, which is composed of code section, data section, function calling stack, operand stack, instruction pointer, etc. all that is good to the executing and the debugging of program

    在虛擬機實現方面，將所有p -指令封裝為類來實現；並用虛擬機維護由代碼區、數據區、函數調用棧、操作數棧和指令計數器等共同構成的運行時環境，控製程序的執行，有利於實現調試功能。
  20. A reserved area of memory where the cpu automatically saves the program counter and the contents of working registers when a program interrupt occurs

    內存中的一塊留用存儲區，當程序中斷產生時， cpu自動在其中保存程序計數器和工作寄存器的內容。
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