晶體復元 的英文怎麼說

中文拼音 [jīngyuán]
晶體復元 英文
crystal recovery
  • : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
  • : 體構詞成分。
  • : Ⅰ形容詞1 (重復) repeated; double; duplicate 2 (繁復) complex; compound Ⅱ動詞1 (轉過去或轉過...
  • 晶體 : [晶體學] crystal; vitrella; crystal body; crystalloid; x-tal
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機系結構及軟結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟容錯技術研究,提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢機制和策略,同時研究了利用系統重注入進行軟在線自修的容錯技術;最後研究了基於fpga的部件級容錯技術,提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案,實現該方案所需增加的電路少,可避免板級以及fpga內部任何邏輯發生單點故障。
  2. The lighter rare-earth metals, from cerium to europium in the first half of the series, have more complex crystal structures than the heavier elements.

    輕的稀土金屬,從鈰到銪的前一半序列比重素具有更為雜的結構。
  3. In the entitative routing stage, the macro - cell layout must be compressed for optimization area and time delay. it should be compared beauty with the routing result by manual. an algorithm, which is gridless, variable widths and minimizing layer permutation, is advanced for channel region

    管級實布線階段,由於庫單用性,要求庫單版圖緊湊,即要求單版圖在滿足各約束條件的前提下面積、性能優化程度較高,能與手工設計的版圖相媲美。
  4. In all kinds of complicated network, oriented linking and unlinking, communication frequency resource is strained, and bandwith to transmitting audio frequency signal is too restricted, complicated and fluky, while audio frequency data exponential have been increased in the last several years. under the circumstances, based on the research of predecessor, this paper studies wavelet analysis ' s maths gist and practices significance on signal process, and puts forward a optimized wavelet package condensation arithmetic to process audio frequency data, which gives attention to coding efficiency, multirate and compression delay. simulation experiment on the arithmetic has been done by matlab

    針對無連接和面向連接的各種雜網路環境下,通信頻帶資源緊張,音頻傳輸帶寬有限且雜多變,而各種音頻數據又日益增多的局面,本文研究小波分析在信號處理方面的數學依據和在數據壓縮方面的實際意義,在前人不斷工作的基礎上,提出了一種優化小波包變換編碼方案用於音頻數據的壓縮演算法,兼考慮了編碼效率、多碼率和壓縮時延多個方面,並在matlab環境下做了模擬實驗,對各種音頻信號及多種小波函數做了模擬結果比較,實驗結果證明該演算法可以在一定計算雜度下可以很好地改進壓縮效果,達到多碼率下實現實時編解碼的過程,在高速dsp等硬設備支持下,可以有效應用於實際雜多變信源編碼。
  5. Because of the large stuff of silicon, complex structure of furnace and expensive cost, computer simulation is a best way to optimize design. in order to study the new heat system, we have calculated the heat zone of 200mm solar cell czsi growth

    由於拉過程中投料量較大,爐結構雜、造價昂貴,所以計算機數值模擬對于優化單爐設計是一種重要的工具。本論文用有限方法對改造后單爐的適合的熱場進行了數值模擬。
  6. The biochip scan and analysis system scans and analyzes hybridizable signal quickly, parallelly and effectively. nowadays, the scanner and computer accomplish scanning and image processing of biochip separately, which leads to complex structure, inconvenient operation, large size, high price and unpopularity

    目前生物的掃描和圖像數據的處理分析分別是由成像裝置和臺式計算機來完成的,結構雜,操作繁瑣,積大,成本高,推廣困難。
  7. 2. the design of program searching and parsing and de - mux module, which are the application software of the stb, are discussed in this dissertation. 3

    利用hi2011及其提供的開發軟包進行了有線電視數字機頂盒的應用程序開發,即節目搜索及節目提取程序的設計和解用通道的軟設計。
  8. Specification for harmonized system of quality assessment for electronic components - blank detail specification - phototransistors, photodarlington transistors, phototransistor arrays

    電子器件質量評定協調系.空白詳細規范.光電管光電管光電管陣列
  9. The subject has mainly finished designing and debugging software and hardware of a / d decode module, fpga video processing module, video data frame deposit module, base clock produce module, d / a encode module, i2c bus control module, etc. a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing

    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬設計及調試。其中a d解碼模塊採集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼的初始化。
  10. As a crucial embedded development tool, the embedded system debugger is usually used to debug and test embedded software 。 a embedded system debugger consists of a cross debugger and a debugger agent, which characteristic lies in the separation of running environments between the cross debugger and the debuggee and the dependence on the gdb agent in the debug session 。 with the development of embedded technique, various embedded debug techniques continuously advance and all kinds of embedded system debuggers are playing a more and more important role in the embedded software development 。 the gnu debugger, gdb as a tool in the gnu toolkits, is an extremely powerful source - level debugger 。 among gdb ’ s many noteworthy features, its ability to debug programs “ remote ” is fascinating 。 this capability is not only essential when porting gnu tools to a new operation system or microprocessor, but it ’ s also useful for developers who need to debug an embedded system based on a processor that gnu already supports 。 gdb is the preferred solution in embedded development because it provides portable, sophisticated debugging over a broad rang of embedded systems 。 this paper discusses the status quo of various embedded system debuggers ; deeply analyses the overall structure of gdb and the debugging mechanism of gdb based on its source codes ; introduces the gdb ’ s remote debug technique and gdb / mi, which are usually used to develop the gdb - based embedded system debugger 。 then dwells on how to use gdb / mi to develop a gui front and how to use rsp 、 stub and gdbserver to design a debug agent, in order to expatiate on the design method of the gdb - based embedded system debugger 。 in the end, provides a concrete implementation of the gdb - based embedded system debugger of “ embedded simulation development platform ”, the project of the innovation fund for technology based firms 。

    這個特性不僅在將gnu工具移植到一個新的操作系統和微處理器的時候很有用,對于想調試一個基於gnu支持的的嵌入式系統的開發人員來說,也是非常有用的。由於gdb提供了在大多數嵌入式系統上的可移植的、雜的調試功能,它已成為嵌入式開發的首選解決方案。本文討論了當前的各種嵌入式調試器的現狀,結合源代碼詳細分析了gdb的結構和調試原理,介紹了開發基於gdb的嵌入式系統調試器常用的遠程調試技術和gdb / mi介面;然後詳細闡述了如何使用gdb / mi開發gdb的圖形前端和怎樣使用rsp協議、 stub和gdbserver設計一個調試代理,從而較深入地討論了基於gdb的嵌入式調試器的設計方法;最後,結合國家中小型企業創新基金項目「嵌入式模擬開發平臺」 ,給出了一個基於gdb的嵌入式系統調試器具實現。
  11. With the rapid development of the semiconductor process and relevant technology, beyond the traditional integrated circuit, system - on - a - chip ( soc ) is coming up. it consists of a lot of intellectual property ( ip ) blocks and embedded processors, which require a piece of embedded software code to be composed. with design complexity beyond the traditional chips, verification difficulty is growing up

    系統是隨著集成電路的發展而出現的新一代,在系統的設計中大量採用ip核用技術,系統中還包含有嵌入式的處理器,因而需要同時設計嵌入式的軟程序,其設計雜度遠遠高於傳統的ic
  12. The asic chip embedded with bluetooth is usually employed as keyboard mouse equipment controller at present, so that is complicated and expensive to realize. noteworthily a new style of design is developed in the article : a 51 mcu is employed as keyboard mouse equipment controller while controlling bluetooth module as host, which give full play to 51 mcu and make the product at low cost, the design has sure practicability and innovative ; the software of pc end is designed as operating in the backstage, which receives data from usb interface to simulate the function of the keyboard and mouse. the design is easy, the thought is ingenious

    由於目前常見的藍牙鍵盤鼠標設備控制器都是用嵌入藍牙核的asic實現,所以實現雜而且價格昂貴,而文中設計獨辟蹊徑:用一片51單片機作鍵盤和鼠標的微控制器,兼作控制藍牙模塊的主機,充分發揮了51單片機的性能,實現了低成本設計,具有一定實用性和創新性; pc機端軟則設計為運行在後臺的應用程序,接收usb介面數據並進行處理,以模擬鍵盤鼠標功能,這一設計簡單易行,思路巧妙。
  13. A mixture of three amino acids ( arg, gly, glu ) labeled with fluorescein isothiocyanate ( fitc ) was separated in pdms microfluidic chip, the separation voltage is 200v / cm, the separation time is less than 120 seconds ; according to ccd fluorescence images, two distinct physical processes - stacking and destacking during sample injection were studied qualitatively ; rhodamine b, a kind of temperature - dependent fluorescence dye, was used as probe to develop a temperature - fluorescence intensity equation, then temperature - color map in microchannels was constructed, and temperature trait in microchannels on the pdms microfluidic chip was analysed. according to the results, we conclude that the electric field applied to the pdms microfluidic chip should not exceed 400v / cm

    利用pdms微流控對fitc標記的精氨酸、甘氨酸、谷氨酸混合物進行了電泳分離,分離電壓為200v cm ,分離時間不到120秒;通過拍到的熒光顯微圖像對電泳注樣過程中雜的樣品分子積聚與解聚現象作定性的分析;以熒光染料rhodamineb為溫度熒光探針,建立了pdms微流控上的溫度-熒光強度的關系公式,並利用matlab圖像處理工具箱構建出微流溝道內的溫度色圖,對pdms微流控的微流道溫度特性進行了分析,根據實驗結果,我們認為對于pdms微流控來說,在進行需要外加電場作用的試驗時,外加電場不應超過400v cm 。
  14. To realize nolinear excitation controller, it must be improved that the disposal speed of nolinear excitation control " s signal. with analyzing and comparing all kinds of microcomputer excitation controller, a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger. it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation

    論文進一步針對非線性勵磁控制要求信號處理速度高、信息量大的特點,在對目前微機勵磁控制器分析基礎上,提出採用dsp控制器作為核心處理器的微機勵磁控制器的解決方案,運用雜可編程邏輯器件cpld實現可控硅同步脈沖觸發單,並簡要說明了verilog硬描述語言和數字脈沖形成邏輯的方法,通過電路數字模擬對所設計的數字觸發單進行了驗證。
  15. Onjanuary22nd, 2005, the “ zhongshi number one ” digital television ground transmission chip, independently researched by microelectronic research institute of fudan university and produced by shanghai hongli semiconductor and smi, passed the technical evaluation hosted by ministry of education and participated by academicians from chinese academy of sciences and chinese academy of engineering

    2005年1月22日,由旦大學微電子研究院自主設計、上海宏力半導和中芯國際本土製造的「中視一號」數字電視地面傳輸,通過了由國家教育部主持、中國工程院和中國科學院院士參與的技術鑒定。
  16. Noticing that strong exothermic reaction due to large negative enthalpy of mixing can occur among major components of ti - zr - based quasicrystal alloy systems and zr - based bulk amorphous alloy systems, we developed for the first time a new technique for fabricating both ti - zr - ni systems quasicrystal materials and zr - al - ni - cu systems amorphous - based composite materials using laser - induced self - propagating reaction synthesis ( lsrs )

    注意到構成ti - zr基準合金系和zr基大塊非合金系的主要組之間具有很大的負混合焓,因而能夠發生很強的放熱反應。利用這一特點,我們首次開展了激光誘導自蔓延反應合成ti - zr - ni系準材料和zr - al - ni - cu系非合材料的探索研究。
  17. As the semiconductor process technology steps into the deep sub - micro scale, the increasing number of transistors on single chip is making the digital system ever more complicated, and the clock frequency has already achieved the level of kilomega hz

    隨著半導工藝水平步入深亞微米階段,單個上的管數越來越多,現代數字系統變得越來越雜,時鐘頻率也己經能達到千兆赫茲以上。
  18. Firstly, we present the conception and technology of software reuse, then deeply discuss key technologies of software reuse such as software component technology, software architecture and domain analysis, etc, whose software component, i. e. software chip, is the main part of software reuse ; software architecture is software framework, which can been reused as software framework of a large granularity and higher abstract level and offers the fundament and the context for component integration ; domain analysis concentrates on a special application domain so that the generality of the design of software component is not considered in wide range, meanwhile its ratio of the reuse increases

    本文首先敘述了軟用的概念和軟用技術,然後深入探討了軟構件技術,軟系結構和領域分析等軟用中的關鍵技術,其中軟構件技術(即軟)是軟用的核心;軟系結構是軟的骨架,可以作為一種大粒度的、抽象級別較高的軟系結構進行用,並能夠為構件的組裝提供基礎和上下文;領域分析使軟用的目標集中在一個特定應用領域內,使構件的製作不需要在很廣的范圍內考慮其通用性,構件的用率也相應增大。
  19. Semiconductor devices. harmonized system of quality assessment for electronic components. phototransistors, photodarlington transistors and phototrasistor - arrays. blank detail specification cecc 20 003

    半導器件.電子器件統一質量評審系.光電管光電管和光電半導電路.空白詳細規范cess 20 003
  20. Similar with design verification problem, to predigest chip level layout synthesis problem, the layout synthesis based on the standard - cell methodology can be divided into two levels : inner standard - cell and among standard - cells. however, along with the increasing of chip size, chip level layout synthesis problem become more complex if it still bases on general manual standard - cell. because the router cannot impose the characteristic of the transistors in the standard - cell, it may reduce the performance of the whole chip

    通常,基於標準單布圖模式將版圖綜合劃分成單內與單間兩個層次,以簡化級自動版圖綜合問題的雜性;但隨著規模的不斷擴大,基於主要以手工定製的小規模標準單級版圖綜合問題的雜性不斷增大,且標準單間布線無法充分利用單管特徵,影響的整性能。
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