晶體管級模擬 的英文怎麼說

中文拼音 [jīngguǎn]
晶體管級模擬 英文
transistor level simulation
  • : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
  • : 體構詞成分。
  • : Ⅰ名詞1 (管子) pipe; tube 2 (吹奏的樂器) wind musical instrument 3 (形狀似管的電器件) valve;...
  • : Ⅰ名詞1 (等級) level; rank; grade 2 (年級) any of the yearly divisions of a school course; gra...
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 動詞1. (設計; 起草) draw up; draft 2. (打算; 想要) intend; plan 3. (模仿) imitate
  • 晶體 : [晶體學] crystal; vitrella; crystal body; crystalloid; x-tal
  • 模擬 : imitate; simulate; analog; analogy; imitation; simulation模擬艙 boilerplate; 模擬電路 [電學] circ...
  1. The flow of post - sim with synopsys nanosim amp; star - rcxt

    流程
  2. Design and simulate of the single stage common emitter amplifier

    阻容耦合放大器電路設計與
  3. Based on many other circuit formats, a new kind of logic - level circuit representation, called unified middle - level circuit format ( umcf ), is defined in this paper, in which some special operations on circuit related with power estimation and low power design. umcf can not only interchange circuits of different formats, but also convert circuits to hspice acceptable files, which can be used for transistor level power estimation

    本文結合多種不同的電路格式,自主定義了一種邏輯電路的中間表示形式(稱為umcf )和一系列極具特色的與低功耗技術相關的操作,它不但可以實現與其他多種電路格式之間的相互轉換,還可以將電路直接轉換成hspice可以接受的文件,進行的電路功耗估計,這樣可以在公認的高精度的功耗器上,對本文的結果進行有效的驗證。
  4. The feasibility and effectiveness of the iddt testing are both validated by experiments. at last, transistor bridging faults are simulated based on iddq testing and gate bridging faults and stuck - at faults based on voltage testing through detaching a pattern pair into two independent patterns

    最後,把一個輸入向量對看成兩個獨立的向量,分別採用穩態電流測試方法和電壓測試方法橋接故障的故障和橋接故障的門故障及固定故障。
  5. The effect of a few important geometrical and physical parameters which include the length of the active region, the thickness of the active region, bulk traps, interface traps, on the tft ( thin film transistor ) characteristics of polycrystalline silicon has been investigated by using advanced two dimensional device simulation program medici

    摘要利用高二維器件程序medici分析了多矽薄膜有源區的長度、內陷阱、界面陷阱、柵氧化層厚度等幾何參數及物理參數,並研究了這些參數對薄膜特性的影響。
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