模組驅動器 的英文怎麼說

中文拼音 [dòng]
模組驅動器 英文
driver of modules
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : Ⅰ名詞1 (由不多的人員組成的單位) group 2 (姓氏) a surname Ⅱ動詞(組織) organize; form Ⅲ量詞(...
  • : 動詞1. (趕) drive (a horse, car, etc. ) 2. (快跑) run quickly 3. (趕走) expel; disperse
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 模組 : die set
  • 驅動器 : actuator
  • 驅動 : [機械工程] drive; prime mover
  1. Fsmail adopts and implements the asynchronous event driven mechanism, with all those network i / o operations in the server working under the non - blocking style ; accomplishes object - oriented heap with the dynamic array, adapted to any type of data ; adopts the multi - queue scheduling mechanism based on a fsm, easily to fulfill the extentions of delivery funtions ; fulfills the non - blocking domain name resolvement mechanism and the caching of the resolved results ; implements the non - blocking user database management and the caching of the user data recently accessed ; uses the unified memory pool management, avoiding the memory leakage and improving the performance of the fsmail server ; lastly, implements the log management server based on the c / s mode, eliminating the inconsistency of the logging metadata and being adapted to any kind of application logging

    Fsmail採用並實現了異步事件機制,所有網路i o的實現使用了非阻塞方式;以態數實現了基於面向對象的堆隊列,屏蔽了堆數據的非一致性;使用了基於有限狀態機的多隊列郵件調度機制,為后續版本的擴展性提供了良好的介面機制;服務內部實現了非阻塞的域名解析機制,並實現域名地址緩存;實現了非阻塞的用戶數據庫管理塊,並實現用戶數據緩存;使用了統一的內存池管理機制,既防止了內存泄漏,又提高了服務的性能;最後,還實現了基於c s式的日誌管理服務,屏蔽了日誌數據元的非一致性。
  2. The main computer is programmed under windows, while the assistant computer is programmed under dos. the last, based on the idea of module - structure, the software of the testing system are designed, thus this software system is compatible and transplantable to design again. the experiment of measuring principle is taken : take the xy flat of lathe as the parallel - pole device and adjust the angle of sensor, the rotating - probe can test the felloe mould in scanning way

    藉助虛擬儀的思想,對測控系統進行了設計:採用光柵尺、光電編碼測量可部件的運量,解析度高、誤差小;採用細分的步進電機裝置,控制性能好;系統實施環境溫度的檢測、補償,提高了檢測精度;基於兩級微機建測控系統:主機為人機界面,採用windows編程,從機用dos編程,實時性好;軟體設計採用兼容性和移植性好的塊式結構,便於二次開發。
  3. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給出了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給出了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀存板實現對圖象數據進行高速存儲;通過對pci總線介面的深入研究,優化後端狀態機設計和低層程序開發,給出了完整的pci介面方案實現高速dma數據傳輸,完全可以滿足視頻傳輸要求;深入研究了基於大規可編程件的數字系統設計方法,針對通用fifo使能信號漂移、輸出數據難于建立和保持等設計難點,提出了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各塊之間的數據高速傳輸。
  4. Through analysising the characteristics of the power system with floating neutral point deeply, the paper puts forward a new plan of single - phase to ground fault line selection on the base of s ' s signal injecton method and gives the hardware and software design. in this design, the high speed sampling and data processing is carried out through using dsp processor ; the large electrice current is drived through the application of a high - performance audio power amplifier and transformer ; the communication between host computer and detectors is realized through rs485 bus technology ; the difference multilevel frequency - selected amplifier is designed and the feeble signal of space is sampled on the base of the theory of magnetic induction ; the interface between dsp and exterior chip and rs485 interface logical is designed through using fpga ; the using of lcd module and keyboard interfacing chip makes the interface between human and machine ; the programme of host computer and detectors is designed through using blocking design method

    在本設計中,採用高速的dsp處理,實現了對故障特徵信息的高速採集與處理;採用大功率的功放晶元與變壓配合的方法,實現了大電流信號的輸出;採用485總線技術,建了裝置主機與多探測之間的主從式通訊網路,實現了多干擾條件下裝置主機與多探測的可靠通訊;設計了差分式多級選頻放大電路,採用磁感應的方法實現了對空間微弱信號的接收;利用fpga技術,實現了控制與多外設的介面及數字信號的串並轉換;採用了先進的lcd液晶顯示塊及鍵盤介面晶元,設計了人機信息交互的介面;採用了塊化的軟體設計方法,開發了裝置主機及探測的軟體程序。
  5. The modern unmanned helicopter flight control system is generally composed of the flight control computer, the servo driving mechanism, the sensor, and the ground monitor control system etc. in this thesis the research to the helicopter flight characteristics was conducted at first, and its flight dynamic model was preliminary discussed, especially the mathematic model under hung - stop condition was formulated and the algorithm of the controller was designed in detail

    現代無人直升機飛行控制系統一般由飛行控制計算機、伺服機構、傳感、地面監測控制等分系統成。本文首先對直升機的飛行特性進行了研究,並且對飛行力數學型做了初步探討,尤其對在懸停狀態下的數學型做了較為詳盡的公式推導和控制的演算法設計。
  6. The linux pcmcia cf layer consists of device drivers for pcmcia host controllers, client drivers for different cards, user mode programs, daemons that aid hot plugging, and a kernel card - services core that interacts and provides services to all of the above see

    Linux pcmcia / cf層由pcmcia主機控制的設備程序、不同卡的客戶機程序、用戶式程序、有助於熱拔的后臺進程和與以上各部分交互並為它們提供服務的內核卡服務中樞成(請參閱
  7. The main circuit is consisted of 18 thyristors circuit and protection circuit. with the help of control subsystem, it can get the output of low frequency voltage ( current ) with the shape of sine wave ; the core of the control subsystem is the cpu of 87c196kc, and the synchronization circuit, the pulse - widen circuit, and the power - enlarged circuit form the accessorial subsystem of the control system. it possesses all the functions of digital triggering, digital tuning, analog / digital conversion ; the input transfer can isolate the input and output ; and the circumfluence reactor can reduce the circumfluence

    主迴路採用由18個晶閘管成的三相零式電路,並輔以晶閘管的保護電路,通過控制可以得到低頻正弦波的電壓(電流)輸出;控制迴路主要以87c196kccpu為核心,其外圍電路包括同步電路,脈沖拓寬電路,功率放大電路等,完成了數字觸發、數字調節、數轉換等功能;進線電源變壓具有變壓和隔離作用;環流電抗則實現了有效抑制主迴路瞬時脈環流的功能。
  8. There is difference frequency measurement requirement for every part of pid regulating, difference between dynamic quality and static quality in response time and accuracy. according to these, it use the interrupt functions and high - speed counter of the simens s7 - 200 plc cpu226 basic unit and some peripheral circuit to measure frequency ; in software designed, the procedure frame of hydraulic - turbine governor and disperse process of parallel pid are analyzed, an improved pid algorithm is adopted to realize a pid regulation mode with variable structure and parameters ; the mechanical liquid - pressure system of the hydraulic - turbine governor is with electric - hydraulic converter unit of step motor. according to the drive character of five phase of response step motor, a variable frequency regulated voltage driver unit is designed in order to realize interface between plc and driver of step motor

    本文利用s7 - 200plc自身的特點設計了頻率測量單元,根據pid調節各個環節的特點,以及調速態特性、靜態特性對頻率測量的實時性和精度要求的不同,利用s7 - 200plc基本單元中內置的高速計數以及相應的外圍放大整形、分頻電路,實現了水輪發電機頻率的測量;在軟體上,對微機調速的整個程序框架、並聯pid的離散化過程進行了分析,選用改進的pid演算法實現了變參數、變結構的pid調節式;調速的機械液壓隨系統具有步進電機電液轉換元件,採用五相反應式步進電機,根據其特性設計了變頻調壓,實現plc與步進電機之間數字介面。
  9. With the use of new mcu p87c591, as the techiniques of serial communication and negative display of lcd, the dashboard has a very beautiful apearence and the system is simplified. not only the analogy signal and the pulse signal can be sampled into the instrument, but also the datum on the can - bus should be transferred into the system whit the connection to the in - vechile network. under the guindance of the idea of " informatic design ", the digital lcd dashboard system is developed, and the professional manufacturer of lcd display device is directed to develop and to design the special lcd module, by which the new lcd production is greatly optimized. all these intentions bing about a very well goal

    在研製數字液晶儀表過程中,應用了新型單片機p87c591 、串口技術和負顯技術,使該數字液晶合儀表結構簡單,視覺美觀,既可以通過擬通道、數字通道測量車輛傳感的信號,又具備接入車輛總線、從can總線上獲得相關數據的能力。在項目開發過程中,運用「信息化設計」的觀點開展液晶顯示塊的開發和設計工作;並根據軟體工程的原則,優化了液晶塊的電路設計,使該項產品的開發取得了好的效果。
  10. This paper gives emphasis to expatiate on the function of the system 、 hardware configuration 、 software flow, and introduces the simulation research and actualization method of the fuzzy controller for stepping drive - control system in detail

    該文重點闡述了測控實驗系統的功能、系統硬體成、軟體程序流程,詳細介紹了系統中步進控制系統糊控制擬研究與實現方法。
  11. When this paper introduces the hot swap design and implementation of each level of the gf8516 core router, it puts emphasis on the design and implementation of the hot swap interface board drivers and the hot swap support platform including the common management module of network processors, the hot swap system driver, and so on

    在介紹gf8516核心路由的各層熱切換的設計與實現時,本文著重介紹了包括網路處理公共管理平臺及熱切換系統程序等成部分的熱切換支撐平臺以及熱切換介面件的設計與實現。
  12. Two programmable digital electronic pid temperature controllers, one for each heating platen, is driving each a proportional electronic relay connected to the bank of heater cartridges

    針對每個熱壓臺採用兩個可編程數字式電子pid溫控,每個分別連接到加熱上的比例電子繼電
  13. And power loss analysis of srs and the layout design related to srs are very important to the proper design. with a small signal mathematic model of half - bridge converter, the relationship between performance of power supply and frequency domain characteristics of the system is analyzed. based on the above study and some simulation the system design is completed

    文中在給出了結合單繞方案的對稱半橋變換穩態原理分析、同步整流管損耗分析暨選擇原則、同步整流管相關電路的布局設計后,建立了對稱半橋變換的小信號數學型,分析了電源系統時域性能指標與頻域特性之間的聯系,在此基礎上完成了系統的設計。
  14. Based on this scheme, the control system architecture is designed. based on this system ’ s necessary, the signal conditioning interface box is designed, it is used in the conditioning of sensor and the design of drive circuit, the software of controller is also developed, finally, the performance index of controller is validated by a closed - loop simulation test system with aero - engine model and digital controller

    根據此方案,確定了擬平臺中控制系統的體系結構,根據系統的需要,設計了信號調理介面機箱,實現了對傳感信號的調理及電路的設計,並進行控制軟體的開發,最後利用發機數學型和數字電子控制成閉環擬環境,以驗證控制的各種性能指標。
  15. As with linear mode, you can combine block devices from various sources such as ide and scsi drives into a single volume with no problems

    就像線性式一樣,您完全可以用raid - 0將來自各種(諸如ide和scsi)的塊設備合為單個卷。
  16. According to the engineering practice, a multi - target based secondary correction control law is promoted and further verified by numerical simulations. the effects of frequency characteristic are researched which reduced by length, thickness and the placement. controllability optimization criteria of actuators ’ configuration are studied with a new controllability energy based criteria integrated, and optimization result is got

    2 、壓電位置優化配置問題的研究,主要研究了壓電的長度、厚度和配置位置點對系統頻率特性的影響,在基於可控度配置準則方法上,合一種新的配置準則,並通過擬得到最優配置位置。
  17. This paper projects a utility subdividing drive system of step motor, which consists of digital control module, drive module and power module, it uses at89c52 single chip processor as the core, it realizes the external event or generates control signal by i / o interface, timer and external interruption, the system introduce pld device and isp technology to the design of phase sequencer, it simplified circuit and improved the anti - disturbing capability by using abel - hdl language, this system can realizes data memory, velocity digital control and led display, etc. this paper adopted firstly the single - chip technique to design control system, which replaced old complicated logic control circuit and simplified test process

    本文研究了一種實用的步進電機細分系統,由數字控制塊、塊和電源成,系統以at89c52單片機為核心,通過單片機的i o口、定時計數中斷來實現外部事件監控以及控制信號的產生,系統將可編程邏輯件( pld )件和在系統編程( isp )新技術引入到細分環行分配的設計,通過abel _ hdl語言編程實現硬體軟化設計和邏輯重構,大大簡化了電路,並提高了電路抗干擾能力。使系統實現參數存儲,速度數字控制,數碼顯示,進退刀控制等功能。
  18. Instrument drivers are an important component in modern automated test systems. they perform the communication and control of the instrument hardware in the system, as well as providing a high - level and easy - to - use programming model that turns complex instrument measurement capabilities into simple software function calls

    是現代自測試系統的重要成部分,它實現了和儀的通信並對它進行控制,提供了更高層的、易用的編程型,使得對儀的自測試變為簡單的函數調用。
  19. Control system makes up of programmable controller, motor driver, motor, etc. the console controls plc and the motor driver changes the pulse into right frequency

    控制塊由松下fp - e型plc 、富士faldic -系列伺服及gys系列交流伺服電機等成。
  20. The thesis is composed of 9 parts : the background, significance, main topics and innovations in the thesis are introduced in chapter 1 ; in chapter 2, the main function and performance of interface circuits are described from the view of system by using the example of gigabit ethernet ' s transceiver ; the transmission media ' s frequency characteristics and model are analyzed for the high - speed data transmission system in chapter 3 ; the line driver is presented in chapter 4 ; the equalization principles for high - speed data transmission system are introduced in chapter 5 ; a novel adaptive equalizer for 1000base - cx transceiver is presented in chapter 6 ; in chapter 7, a fixed equalizer for 2. 5gbps transceiver is described ; in chapter 8, layout design and measured results are discussed ; at last, the conclusions are drawn in chapter 9. during period of finishing the thesis, i read lots of literatures about the interface circuits in high - speed data transmission system, studied their principles and design techniques, and designed : 1 、 the line driver for 2. 5gbps baseband copper cable transceiver ; 2 、 the fixed equalizer for 2. 5gbps baseband copper cable transceiver ; 3 、 the fixed equalizer for 1. 5gbps sata ( serial at attachment ) transceiver ; 4 、 an adaptive equalizer for 1000base - cx transceiver

    論文由9部分成:在第一章引言中介紹了論文的背景、意義、國內外研究現狀,以及論文的主要內容和創新;第二章以千兆位以太網為例,從系統的角度介紹了高速數據傳輸系統介面電路的主要功能和性能指標;第三章分析了高速數據傳輸系統的傳輸介質的頻率特性和型;第四章描述了線的設計原理及其電路實現;第五章描述了高速數據傳輸系統的均衡原理;第六章描述了適用於1 . 25gbps基帶銅纜收發系統的自適應均衡的設計原理和電路實現;第七章描述了適用於2 . 5gbps基帶銅纜收發系統和1 . 5gbps串列硬盤介面( sata )收發系統的固定均衡的設計原理及其電路實現;在第八章中分析了電路的版圖設計及晶元測試結果;最後,第九章總結了全文。在完成論文期間,查閱了大量的有關高速數據傳輸系統介面電路方面的文獻,較系統地學習了線、傳輸線和均衡等方面的理論知識和電路設計原理,設計了用於: ( 1 ) 2 . 5gbps基帶銅纜收發系統的線; ( 2 ) 2 . 5gbps基帶銅纜收發系統的固定均衡; ( 3 ) 1 . 5gbpssata系統的固定均衡; ( 4 ) 1 . 25gbps基帶銅纜收發系統的自適應均衡
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