深次微米 的英文怎麼說

中文拼音 [shēnwéi]
深次微米 英文
deesubmicron
  • : Ⅰ形容詞1 (從上到下或從外到里的距離大) deep 2 (深奧) difficult; profound 3 (深刻; 深入) thor...
  • : Ⅰ名詞1 (次序; 等第) order; sequence 2 [書面語] (出外遠行時停留的處所) stopping place on a jou...
  • : Ⅰ名詞1. (稻米) rice 2. (泛指去殼或皮的可吃的種子) shelled or husked seed 3. (姓氏) a surname Ⅱ量詞(公制長度的主單位) metre
  1. With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit

    在工程設計方法及結構化設計和高層綜合的研究中,介紹了在工藝條件使用的方法和asic設計流程,討論了高層綜合的核心如何從描述推出電路構成的設計思路,針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法,給出了用vhdl語言進行代碼設計時的規范和風格,在面向soc的驗證策略討論了動態和靜態的驗證技術,提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。
  2. Deep submicron design

    設計
  3. As the progress in deep sub - micron technology, the integration of more heterogeneous components into a system - on - a - chip is performed for reducing production cost

    摘要:隨著深次微米製程的進步以及降低成本的需求,將各式各樣的線路整合至一個系統晶片已經是一種趨勢。
  4. Firstly, the diffraction properties of sub - micron gratings is analyzed using rigorous coupled - wave theory, including the relationship of the direction of diffraction light in each grade and grating period, and the relationship between diffraction efficiency and groove depth

    文中首先利用嚴格耦合波理論( rcwa )分析亞光柵的衍射特性,即各級衍射光方向與光柵周期及入射光角度的關系,亞光柵的衍射效率與槽的關系。
  5. As manufacturing technology shrinks to the deep submicron process, the tolerance of process variation becomes an important subject in the clock tree design

    摘要隨著製程技術縮小至深次微米,製程變異容忍度在時鐘樹設計上已成為一個重要的課題。
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