硬體級 的英文怎麼說

中文拼音 [yìngtǐjí]
硬體級 英文
hardware level
  • 硬 : 形容詞1 （堅硬） hard; stiff; tough 2 （剛強; 堅定; 強硬） strong; firm; tough; obstinate 3 （勉...
  • 體 : 體構詞成分。
  • 級 : Ⅰ名詞1 （等級） level; rank; grade 2 （年級） any of the yearly divisions of a school course; gra...
  • 硬體 : hardware
  1. We ' re talking 500 acres of hardware, cray super computers, ampliation chips

    那裡是佔地五百畝的硬體，超級cray計算機目前最快，最貴的，擴充的晶元
  2. The circuits driving the ccd and processing the video signal are implemented by means of cpld ( complex programmable logic device ) and hdl ( hardvvare description language ). the solution to solve the problem of multi - level logical competitive risks that occur in cpld circuits frequently was provided in details in the thesis

    Ccd的驅動電路和視頻信號處理電路採用cpld （可編程邏輯器件）和hdl （硬體描述語言）實現，文章對cpld電路中容易出現的多級邏輯冒險競爭情況作了專門的敘述和提出相應的解決方法。
  3. The paper studies and designs the circuit driving the servo motor and the motor for clearing, and the serial communication circuit, and the sensor data input circuit etc. the author develop the embedded controller software based the advanced singlechip language - pl / m and the user interface software base vc + + 6. 0

    進行了清刷機器人的伺服電機驅動與控制電路、清刷電機驅動與控制電路、串列通訊電路、傾角傳感器數據採集等硬體電路的設計，並進行了基於pl m高級單片機開發語言的下位機嵌入式控制軟體的開發和基於vc + + 6 . 0的上位機用戶操作界面的開發。
  4. This thesis tries to update the cmdsr system to achieve the characters below : real - time, better robust, higher recognition rate, non - special - man. considering the disadvantages of traditional improved spectrum subtraction speech enhancement, this thesis proposes the theory of fuzzy spectrum subtraction based on the fuzzy theory and improved spectrum subtraction speech enhancement ; as for the difficulties of detecting the endpoint of speech signal, the thesis gives the table of initial and the improved parameters, with which we can confirm the endpoints of mandarin digit speech ; the thesis puts forward two - level digit real - time speech recognition system, the first level is based on discrete hidden markov model which is linear predictive coding cepstrum ( lpcc ) and difference linear predictive coding cepstrum ( dlpcc ), the second level is based on formant parameters ; as for the realization of hardware, the thesis depicts the realization of every part of cmdsr based on the tms320vc5402 in detail ; as for the development of software, the thesis gives the software design flow chart of cmdsr, simulates the basic theory with matlab language and gives the simulation results

    針對傳統的「改進譜相減法語音增強」參數設定單一、環境適應能力差的缺點，提出了一種利用模糊理論和「改進的譜相減法」結合的「模糊譜相減法語音增強」 ;針對語音信號端點檢測困難的特點，通過matlab模擬試驗，給出了能夠準確確定數碼語音端點的初始和改進參數表;提出了利用基於線性預測編碼倒譜參數和差分線性預測編碼倒譜參數相結合的離散隱含馬爾可夫模型進行第一級識別、利用共振峰參數進行第二級識別的兩級漢語數碼語音識別系統，在保證系統實時性的同時，實現連接漢語數碼語音識別系統識別率的提高;在硬體實現上，詳細闡述了基於tms320vc5402的連接漢語數碼語音識別系統各部分硬體設計;在軟體開發上，給出了連接漢語數碼語音識別的軟體設計各部分的流程圖，並對各部分進行了matlab模擬，並給出了模擬結果。
  5. The grosvenor house of the hotel has taken on a new look since the renovation. the decoration of its 28 suites has mixed european - style and modern fashion together. its ranks first among the luxurious hotels in shanghai

    值得驕傲的是，經過重新裝修改造的錦江貴賓樓， 28套房間均採用歐式傳統與現代風格相結合的裝飾，並配以一流的硬體設施，成為上海豪華級賓館之冠。
  6. The design based - on pci bus updates software and hardware handily, economizes cost

    這種總線結構設計靈活性強，軟硬體升級方便，節約成本。
  7. As database size grows into terabyte and petabyte, the time and hardware resources required will grow substantially

    當數據庫大小增長到gb和pb級時，所需的時間和硬體資源將極大的增長。
  8. As an excellent representative of proletariate jurist, dong bi - wu ' s idea of legal education is very abundant : firstly, the core of legal education is the education to people, secondly, the basis of legal education is the hardware constructions for school and so on, thirdly, the improvement of legal education lies in the progress of legal research

    摘要董必武作為無產階級法學家的傑出代表，其法學教育思想較為豐富，主要表現為：第一，法學教育的核心在於對人的教育；第二，法學教育的基礎在於搞好學校等硬體建設；第三，法學教育的提高在於法學科研的進步。
  9. First, this paper gives a method, which is utilized by baseband system according to wcdma system capability requirements, using asic + dsp to realize raker, using dsp + dsp to realize symbol process. the hardware structure of asic + dsp and dsp + dsp is designed from the whole design view. then, the discussion is made of the main function module of ic2001 and dsp, hi module, dsp peripherals on chip such as hpi, edma and emif

    文章首先結合wcdma系統性能要求提出了基帶系統所採用的方案，由asic + dsp實現rake接收機功能和dsp + dsp實現符號級處理功能;然後從總體規劃的角度設計出asic + dsp和dsp + dsp系統硬體結構，對ic2001和dsp的主要功能模塊， hi模塊， dsp片上外設hpi口、 edma和emif總線作了分析，並結合基帶處理功能開發了系統驅動;最後由信號源發出測試數據進入系統，進行功能實現后輸出數據繪制出波形圖，對所設計的基帶系統驅動方案進行驗證分析。
  10. The style of hotels is brief and unique, facilities are complete, will represent and give you a " clean, convenient, warm " accommodation environment. launder services such as clothing, surfing the net with broadband, faxing, copying, ticketing service, etc. ; unify hardwares facilities, the 24 - hour hot water shower, the air conditioner, the tv, the telephone, there are standard spring mattress bed accessories and related furniture

    如家連鎖店的特色有三大「統一」性統一建築設施，由國外設計師提供室內外的設計方案統一的服務，提供三星級賓館的服務理念，洗燙衣寬帶上網傳真復印票務等服務統一硬體設施，提供24小時熱水淋浴，空調，電視，電話，有標準的席夢思床具及配套傢具，設有咖啡廳，為客人提供方便快捷的早餐和茶點。
  11. In this project, the kernel chip is xc2vp4, which is a platform fpga manufac - tured by xilinx co. ise7. 1i foundation which is the latest and integrated eda devel - oping tool is used in the software developing. modelsim se6. 0 and ise simulator are the simulation tools. synplify pro8. 1 and xst are the synthesis tools

    本課題硬體採用xilinx公司xc2vp4平臺級fpga為核心控制晶元，軟體採用xilinx公司最新集成化eda開發工具ise7 . 1ifoundation ，模擬工具modelsimse6 . 0 ，綜合工具synplifypro8 . 1等設計完成，高速電路採用lvds信號進行連接。
  12. You should first verify that the new one boots and all hardware needed for the upgrade works e. g. network adaptors. make your system bootable

    您應該先行確認新的kernel能夠正常開機，且所有在升級過程中必須用到的硬體比如說，網路裝置能夠正常作業。
  13. Apply truncation theory and design multi - stage cic filters with higher efficiency. 3

    應用剪除理論實現多級cic濾波器，進一步提高了硬體效率和運行速度； 3
  14. To decimators of multi - level system designed based on the hb filter and cic filter, analysis of the filter design parameters involved, whose theory applied to multi - level cic filter of design, and designed half band filter with distributed algorithms. compared to the simulation results. these advanced algorithms applications, and further increase hardware efficiency and operating speed

    對于基於積分梳狀（ cic ）濾波器和半帶（ hb ）濾波器的多級系統設計的抽取濾波器組，分析了濾波器設計中所涉及的各個參數，將剪除理論應用於多級積分梳狀（ cic ）濾波器的設計中，並且採用分散式演算法（ da ）來設計半帶（ hb ）濾波器，並對模擬結果進行比較，這些先進演算法的應用，進一步提高了硬體效率和運行速度。
  15. In order to reduce the memory space of the system, ac3 program is optimized and hardware / software co - design method is used to optimize the memory space consumed in system level assemble level and hardware level

    為減少系統的存貯耗費，針對ac3程序進行了存貯優化，並提出了一種應用軟硬體協同設計的方法，即從系統級、匯編級和硬體級進行存貯優化。
  16. Encryption level can be divided into software level, hardware level, soft - hardware level, user can select encryption level

    文件加密的安全程度有軟體級，硬體級，軟硬雙重級，安全級別可以自行選擇
  17. According to the difference of function and hardware linking way, remote monitoring system is often divided into two topologies, that is, bus and star

    根據系統功能和硬體級聯方式的不同，遠程監控系統可分為總線型和星型兩種類型。
  18. This article describes how to achieve high availability for websphere mq using clustering provided at the hardware level using open source software

    本文講述了如何在硬體級上使用開源軟體，讓使用所提供集群的websphere mq具備高可用性。
  19. These classes could not have been constructed without the jvm improvements in jdk 5. 0, which exposed to the class libraries, but not to user classes an interface to access hardware - level synchronization primitives

    如果沒有jdk 5 . 0中的jvm改進，將無法構造這些類，這些改進暴露了（向類庫，而不是用戶類）介面來訪問硬體級的同步原語。
  20. In this way, developer can offer the ic to others for sale, but the way based on dsp ic hardly does. in our research project, we also do the simulation by the software of maxplus, quaturs and emulation board based ic epm7128slc84 - 15, and get the satisfied result

    在本課題開發過程中，我們使用maxplus和quaturs對提出的ip核、速度/加速度控制模塊等進行了軟體級的模擬和測試，並最終在自行設計的可編程晶元模擬板（使用epm7128slc84 - 15可編程晶元）上進行了硬體級的模擬，取得了滿意的效果。
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