結合處理器 的英文怎麼說

中文拼音 [jiēgěchǔlǐqì]
結合處理器 英文
processor associative
  • 結 : 結動詞（長出果實或種子） bear （fruit）; form （seed）
  • 合 : 合量詞（容量單位） ge, a unit of dry measure for grain （=1 decilitre）
  • 處 : 處名詞1 （地方） place 2 （方面; 某一點） part; point 3 （機關或機關里一個部門） department; offi...
  • 理 : Ⅰ名詞1 （物質組織的條紋） texture; grain （in wood skin etc ） 2 （道理;事理） reason; logic; tru...
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  • 結合 : 1 （發生密切聯系; 聯合） combine; unite; integrate; link; binding; coalition; cohesion; connectio...
  1. In this paper, combined with currently voice coding technique, espically with the fabulosity development of the mixed voice coding and the increasingly utility of the digital signals processor. we investigated the voice coding technique and discussed emphasizedly the technology of variable rate voice coding technology

    本文結合當前語音編碼技術尤其是混合編碼技術的驚人發展及數字信號處理器的日益實用化，研究了語音編碼技術，並重點討論了變速率語音編碼技術。論文簡要介紹語音編碼技術中的波形編碼和聲碼器的主要性能。
  2. The distributing design reduce effectively spending of cpu. through following experiments in practice, the outcome indicate that this nav system can accomplish the reckoning on data information of vehicle and has the supernal precision

    這樣有效的減少主處理器的開銷，集中進行卡爾曼濾波數據融合運算。測試結果表明該設計能夠實時完成對車輛的實時經緯度的測算，具有較高的精度。
  3. Combining multilevel scheme, spectral bisection method, kl / fm refinement, as well as multi - partitioning refinement strategy, the computing method is characterized by high efficiency, flexibility, and simplicity because it both maintains load balancing and minimizes the complexity of communication among processors

    演算法結合了多層次思想和譜分區方法、 kl fm精化演算法和多分區調整策略等技術，以保持負載平衡和減小處理器之間的通信復雜度為目標，具有高效、靈活、簡便等特點。
  4. Based on cae system for construction curtain wall structure analysis, it presented a kind of parametric design language w - spdl and the architecture of its processor especially for construction curtain wall structure analysis, which can greatly enhance compound features of the system. it is also helpful to further developing for the system, batch commands processing, parametric design of structure analysis and simplifying the operation flows

    基於建築幕墻結構計算機輔助工程分析系統，建立了一套適合建築幕墻結構分析的參數化設計語言w - spdl ，並提出了一種開放性w - spdl宏處理器體系結構，提高了系統綜合性能，並為基於系統進行二次開發、批命令處理、結構分析參數化設計以及簡化用戶操作流程等提供了支持。
  5. This paper first begin with the connotation of virtual instrument technology, study and discuss the criterion and the working theory of usb deeply. on the principle of usb1. 1criterion, using usb interface chip usbn9604 and low consumption mirochip c8051f231, we designed the available interface of usb bus and its controlling software, turn the communicating function based usb bus between computer and testing device. second based on the developed interface of usb bus, using microchip pic16c62 and a mount of relays, we designed the multiswitching scanner and its controlling software to complete the funtion of accesses swithing in testing system. third calling the api function inside the windows using vb programming language, communicat with the impelling program of selected hid, achieve the function of testing instrument with usb interface, complete the development of upside software faced testing. at last, based on the deep studying of pcb testing method, used the developed multiswithing scanner and software faced testing, combinated with necessary testing instrument, we constructed the pcb testing system and analized the testing result simply

    論文首先從虛擬儀器的技術內涵出發，深入研究和討論了通用串列總線usb規范及工作原理，並依據usb1 . 1規范，採用usb介面晶元usbn9604和低功耗微處理器c8051f231設計開發了通用的usb總線介面及其控制固件，實現了通用計算機與測試設備之間基於usb總線的通信功能；其次，在所開發的usb總線介面的基礎上，使用微處理器pic16c62和多路繼電器開關，設計開發出實現測試系統中測試通道切換功能的多路通道掃描器及其控制固件；再次，採用vb語言編程，調用windows內部api函數，與選定hid類驅動程序進行通信，實現usb總線介面測試儀器功能，完成面向測試的上層軟體開發；最後，在深入研究印刷電路板測試方法的基礎上，利用已開發的多路通道掃描器和面向測試軟體，結合必要測試儀器組建印刷電路板測試系統，並對測試結果進行了簡要的誤差分析。
  6. In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ). processor and uart ( universal asynchronous receiver transmitter ), these cores are used in this dissertation, fpu is used for floating point complex fft processor, uart is used for fft processor " s peripheral and our test platform. in chapter 6 we discuss the design for testability, including atpg, bist and jtag method, discuss the different verification and simulation strategy in soc scale facing to different modules, build up the test platform which is used to test high performance application specified digital signal processing processor. in chapter 7 we summarize the research results and creative points, and point out the further work need to do in the future

    第五章提出了基於ieee754浮點標準的浮點運算處理器的設計和異步串列通信核的設一浙江大學博士學位論文計，提出了適合硬體實現的浮點乘除法、加減運算的結構，浮點運算處理器主要用於高速fft浮點處理功能，異步串列通信核主要用於pft處理器ip核的外圍擴展模塊以及本文所做的驗證測試平臺中的數據介面部分第六章提出了面向系統級晶元的可測試性設計包括了基於掃描測試atpg 、內建自測試bist 、邊界掃描測試jtag設計，在討論可測試性設計策略選擇的問題上，提出了針對不同模塊進行的分別測試策略，提出了層次化jtag測試方法和掃描總線法，提出了基於fpga
  7. As a crucial embedded development tool, the embedded system debugger is usually used to debug and test embedded software 。 a embedded system debugger consists of a cross debugger and a debugger agent, which characteristic lies in the separation of running environments between the cross debugger and the debuggee and the dependence on the gdb agent in the debug session 。 with the development of embedded technique, various embedded debug techniques continuously advance and all kinds of embedded system debuggers are playing a more and more important role in the embedded software development 。 the gnu debugger, gdb as a tool in the gnu toolkits, is an extremely powerful source - level debugger 。 among gdb ’ s many noteworthy features, its ability to debug programs “ remote ” is fascinating 。 this capability is not only essential when porting gnu tools to a new operation system or microprocessor, but it ’ s also useful for developers who need to debug an embedded system based on a processor that gnu already supports 。 gdb is the preferred solution in embedded development because it provides portable, sophisticated debugging over a broad rang of embedded systems 。 this paper discusses the status quo of various embedded system debuggers ; deeply analyses the overall structure of gdb and the debugging mechanism of gdb based on its source codes ; introduces the gdb ’ s remote debug technique and gdb / mi, which are usually used to develop the gdb - based embedded system debugger 。 then dwells on how to use gdb / mi to develop a gui front and how to use rsp 、 stub and gdbserver to design a debug agent, in order to expatiate on the design method of the gdb - based embedded system debugger 。 in the end, provides a concrete implementation of the gdb - based embedded system debugger of “ embedded simulation development platform ”, the project of the innovation fund for technology based firms 。

    這個特性不僅在將gnu工具移植到一個新的操作系統和微處理器的時候很有用，對于想調試一個基於gnu支持的晶元的嵌入式系統的開發人員來說，也是非常有用的。由於gdb提供了在大多數嵌入式系統上的可移植的、復雜的調試功能，它已成為嵌入式開發的首選解決方案。本文討論了當前的各種嵌入式調試器的現狀，結合源代碼詳細分析了gdb的結構和調試原理，介紹了開發基於gdb的嵌入式系統調試器常用的遠程調試技術和gdb / mi介面;然後詳細闡述了如何使用gdb / mi開發gdb的圖形前端和怎樣使用rsp協議、 stub和gdbserver設計一個調試代理，從而較深入地討論了基於gdb的嵌入式調試器的設計方法;最後，結合國家中小型企業創新基金項目「嵌入式模擬開發平臺」 ，給出了一個基於gdb的嵌入式系統調試器具體實現。
  8. For high stability of the system, with the realization of hardware of the system, the second part of this paper starts from the transmission line theory, and studies the signal integrity problem of high - speed circuit system in light current. the causes of these signal integrity problems, such as signal delay, reflection, crosstalk, ground bounce noises and etc. are analyzed in theory. combined with actual design, key points of design and standard design flow of general high - speed, high - precision printed circuit board are summarized, which has been applied in actual system, and good effect has been achieved

    為使系統具有較高的穩定性，本文第二部分結合該處理器的硬體實現，從傳輸線理論出發，研究了弱電情況下高速電路印刷電路板中的信號完整性問題；從理論上分析了延遲、反射、串擾以及地彈噪聲等信號完整性問題產生的原因；結合實際設計，總結了一般高速、高精度印刷電路板的設計要點和標準設計流程，並在實際系統中獲得了應用，取得了很好的效果。
  9. In this paper, an embedded 16 - bit processor core is designed, based on the characteristics of the wireless communication algorithm and instruction level acceleration technology

    文章結合無線通信處理演算法的特點，利用指令級加速技術，設計了一種基於無線通信中復數運算的16位嵌入式處理器核。
  10. + then it will do some other digital process. the evolution of programmable hardware and increased flexibility via increased programmability has been accomplished by a combination of techniques

    實現軟體無線電技術的關鍵技術包括高速a d及高速的可編程數字處理器等，目前的軟體無線電系統多採用專用處理晶元與dsp相結合的方法。
  11. Firstly, this paper makes a detailed study on the field control bus system ( pcs ), including the characters of pcs by comparing fcs and dcs, model networking of pcs and several popular field bus, then put forward a question for discussion combining embeded internet technology and field bus and measure and control networking model based embeded internet technology is constructed. secondly, it studies embeded system including the core of hardware ? mbeded microprocessor and real time operation system. thirdly, the method of realizing embeded internet is discussed for emphasis, and difficulty of ehernet application in industry measure & control system is analysed. an instance of measure & control networking system based embedded ip is given. finally, the author designed a networked remote video surveillance system based embedded web server, c / os - ii is sacled and ported into the embedded microprocessor at89c51. based on the c / os - ii rtos, tcp / ip protocol suite and application program is designed in detail. the system w orks well that improves that the embedded internet technology will be widely used in modern measure & control networking system and has extend values

    本文首先分析了現場總線系統（ fcs ）與傳統集散控制系統（ dcs ）相比具有的特點、 fcs的網路體系結構，介紹了幾種流行的現場總線，提出了將嵌入式internet技術結合現場總線構建現代測控網路的課題；在此基礎上，構建了基於嵌入式internet技術的測控網路結構模型；深入研究了嵌入式系統的核心硬體?嵌入式微處理器，通過對比普通操作系統，描述了嵌入式實時操作系統的特點；重點研究了實現嵌入式internet的四種實現方法，並分析了以太網在工業測控系統中應用的難點，給出了一個基於嵌入式ip的網路測控系統實例；最後，研究與設計了一個基於嵌入式web服務器的遠程網路視頻監控系統，該嵌入式web服務器利用目前成熟的嵌入式實時操作系統c / os - ，通過對c / os -進行適當的裁剪、修改與移植，在at89c51嵌入式微處理器上實現了tcp / ip協議棧及應用程序，系統的成功運行證明了本文研究成果的有效性，也表明嵌入式internet技術在現代測控網路系統中具有廣闊的應用前景和推廣價值。
  12. Subsidence prediction model combining rs and ann ( artificial neural network ) is estab1ished

    建立了以粗集作為前處理器，基於粗集與神經網路相結合的開采沈陷預計模型。
  13. The device can protect the large - scale synchronous motor perfectly. the protection device makes the mature theory such as the over - current value detection, symmetrical component principle and so on as protection criterions and uses the advanced digital signal processor in the device

    該保護裝置運用較為成熟的保護理論和先進的數字信號處理器，把判過電流幅值與對稱分量法理論相結合，準確實現同步電動機保護所要求的各項保護功能。
  14. The second is a fuzzy neuron network based hybrid filter, which comprises four basic components : plus - shaped center weighted median filter, cross - shaped center weighted median filter, nine pixels median filter, and a fusion center with fuzzy - neuron network. the proposed filter is able to effectively inherit the merits of the used three filters. the third is a fuzzy reasoning filter based on neural network

    第二種是基於模糊神經網路的混合濾波器，主要濾波器模塊有十字型中心加權中值濾波器、交叉型中心加權中值濾波器和9點中值濾波器，信號經過三種濾波器處理後送入一個訓練好的模糊神經網路進行融合處理，得到最終的濾波結果。
  15. Combining the favorable capability of ebcot and characteristic of multi - wavelet ’ s coefficients, this article puts forward an integrated filter and pretreatment method based on approximated stairs. it processes the vector quantification of multi - wavelet ’ s coefficients and carries out the mix - scan compression arithmetic towards bit planes of ebcot

    本文結合ebcot的良好性能和多小波變換系數特性，提出一種結合濾波器和基於近似階的預處理方法，並對多小波變換系數進行重新排列和量化處理，對ebcot中位平面進行混合掃描方法相結合的壓縮演算法。
  16. For the real time performance need of the low speed speech compress algorithm and the asic implement of the transfer process between programs, the design is put forward in the paper, in which state registers control the cross access between operator and memory, register windows are used for the parameters transfer, and the technique of hardware controlling is used to avoid pipeline conflict, so that the main problems of the transfer process in tr600 are solved effectively

    摘要針對低速率語音壓縮演算法對處理器系統實時處理復雜運算的性能要求，就程序調用過程的asic實現問題進行了對比與分析，進而提出了用層次狀態寄存器控制存取運算元對存儲體交叉訪問的方法，並結合運用寄存器窗口傳遞參數的功能，以及利用空指令硬布線處理流水線沖突的方法，有效地解決了tr600晶元中調用過程存在的主要問題。
  17. In practical studies, finally, a hybrid active power filter based on the digital signal processor ( dsp ) and intelligent power module ( ipm ) was set up, including a cycloconverter acem. based on the experimental set - up, plenty of experimental studies were conducted. the experimental results demonstrate that the self - adaptive technique, the topology of series connected hybrid power filter and the corresponding significant technologies described above are feasible and practical

    最後，實際研製了一套以dsp （高速數字信號處理器）和ipm （智能功率模塊）為核心的小功率混合型有源濾波裝置，在交交變頻acem實驗平臺上進行了全面的實驗研究，充分驗證了本文所提出的自適應同步相關濾波技術、優化混合型濾波器拓撲結構和有關的關鍵性技術的正確性和實用性，從而從理論到實踐全方位、成功地實現了對交流勵磁發電機輸出電力諧波抑制的研究。
  18. Aim at the current practical situation, a kind design procedure is presented on terminal which based on arm and c / os -, and selects the arm microprocessor and operating system combine with the demand of the subject. it designs the hardware system based on the lpc2124 and the periphery interface chipset, and implements the transplantation of c / os - on the lpc2124, compiles the hardware drivers and the api based on c / os -, the system introduces multitask based on dispatching priority to solve the disadvantage of the foreground / background system. a kind of project on remote update software based on gprs and iap is presented, and discusses the reliability in the end

    針對目前實際情況，在研究了終端設計多項技術的基礎上，設計了一種基於arm和c / os -的配變監控終端，結合課題的要求對arm處理器和操作系統進行了具體選型，在基於lpc2124的mcu和外圍介面晶元上，進行了終端硬體系統的設計;實現了cos -在lpc2124mcu上的移植;編寫了基於c / os -的api介面函數和底層硬體驅動程序;採用多任務按優先權調度的方式解決了任務處理的實時性，克服了傳統前後臺軟體在復雜的監控終端設計中實時性差的問題;針對終端軟體升級方案進行了探討，提出了一種基於gprs網路的遠程在應用編程（ iap ）的軟體升級方案，對終端軟體升級模塊進行了軟、硬體設計，並對升級方案的可靠性進行了探討。
  19. Superscalar risc microprocessor is the further development of reduced instruction set computer, it improve the instruction - level - parallism by means of adding parallel pipelining function units and dynamic on - chip scheduling. this thesis anslysises the architecture and the diversified techniques of superscalar computer

    超標量risc微處理器是精簡指令結構（ risc ）的進一步發展，它通過增加并行流水執行單元並結合片上硬體動態調度來提高指令并行度。
  20. To bring a magnetic chameleon processor to market will require an interdisciplinary research effort that uses the combined skills of specialists in materials science and technology, hardware design and electronics, computer sciences, and mathematics

    要讓磁性變色龍處理器在未來可以打入市場，將需要結合材料科技、硬體設計與電子學、計算機科學以及數學等各領域專家的跨領域研究。
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