線路介面板 的英文怎麼說

中文拼音 [xiànjièmiànbǎn]
線路介面板 英文
lib line interface board
  • : 名詞1 (用絲、棉、金屬等製成的細長的東西) thread; string; wire 2 [數學] (一個點任意移動所構成的...
  • : 1 (道路) road; way; path 2 (路程) journey; distance 3 (途徑; 門路) way; means 4 (條理) se...
  • : Ⅰ名詞1 (頭的前部; 臉) face 2 (物體的表面) surface; top 3 (外露的一層或正面) outside; the ri...
  • : Ⅰ名詞1 (片狀硬物體) board; plank; plate 2 (專指店鋪的門板) shutter 3 [音樂] (打拍子的樂器) ...
  • 線路 : 1. [電學] circuit; line 2. [交通運輸] line; route
  • 面板 : [機械工程] face plate; panel; panel board; frontpanel; face ply [veneer]; surface veneer; skin pl...
  1. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中,本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信、 ecan通信總、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電和ac - dc電源等模塊設計以及控制器前、後等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信,同時系統電配置成中斷響應方式,這樣既滿足了系統要求,又充分利用了tms320f2812的硬體資源。在軟體設計中,本文完成了人機界功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  2. On the other hand, boundary - scan technique intelligent fault diagnostic method was applied to practice. for most digital system, devices with boundary - scan architecture are broadly used. only using four line or five line to connect pc parallel port with cut tap ( test access port ), all the ptvs can be loaded to cut and all homologous prvs can be taken back to intelligent fault diagnosis system

    至於本文採用邊界掃描測試故障診斷技術,是考慮到本系統的通用性和簡潔性,因為對于大多數數字系統而言,具有邊界掃描結構的器件己廣泛應用,本文只需4條或5條信號就能將pc機和被測邊界掃描電連接起來,由此極大地簡化了智能故障診斷系統中為實現ptvs加載和prvs獲取而專門設計的
  3. This paper first begin with the connotation of virtual instrument technology, study and discuss the criterion and the working theory of usb deeply. on the principle of usb1. 1criterion, using usb interface chip usbn9604 and low consumption mirochip c8051f231, we designed the available interface of usb bus and its controlling software, turn the communicating function based usb bus between computer and testing device. second based on the developed interface of usb bus, using microchip pic16c62 and a mount of relays, we designed the multiswitching scanner and its controlling software to complete the funtion of accesses swithing in testing system. third calling the api function inside the windows using vb programming language, communicat with the impelling program of selected hid, achieve the function of testing instrument with usb interface, complete the development of upside software faced testing. at last, based on the deep studying of pcb testing method, used the developed multiswithing scanner and software faced testing, combinated with necessary testing instrument, we constructed the pcb testing system and analized the testing result simply

    論文首先從虛擬儀器的技術內涵出發,深入研究和討論了通用串列總usb規范及工作原理,並依據usb1 . 1規范,採用usb晶元usbn9604和低功耗微處理器c8051f231設計開發了通用的usb總及其控制固件,實現了通用計算機與測試設備之間基於usb總的通信功能;其次,在所開發的usb總的基礎上,使用微處理器pic16c62和多繼電器開關,設計開發出實現測試系統中測試通道切換功能的多通道掃描器及其控制固件;再次,採用vb語言編程,調用windows內部api函數,與選定hid類驅動程序進行通信,實現usb總測試儀器功能,完成向測試的上層軟體開發;最後,在深入研究印刷電測試方法的基礎上,利用已開發的多通道掃描器和向測試軟體,結合必要測試儀器組建印刷電測試系統,並對測試結果進行了簡要的誤差分析。
  4. The speed of isa bus has become the bottleneck between high a / d converters where requests very high speed. isa bus interface card ca n ' t configure resource automatically. there will be no place for isa bus after the vanish of isa slots on computer mainboard

    Isa總有很多優點,但在某些方已逐漸顯出不足:在一些速度要求高的場合, isa總的速度上限已成為高速a / d轉換器與主機間的瓶頸; isa總卡無法實現資源的自動配置;以及計算機主的isa插槽在逐漸的消失,所以本文又提出設計基於pci總
  5. Part two : design the schematic of the intelligent communication card ; to apply protel99 software to design sch and pcb charts, then send them to the factory ; to debug on the hardware and test on can bus chip ; to program assemble language control and can bus communication software of the intelligent communication card and debug on the super ice16 simulator ; to utilize the super ice 16 simulator to debug the control programs of the communication card online ; link to control card and debug the can bus communication program online ; to debug the system on eprom

    第二部分:設計can總智能通信卡的硬體電,應用protel99設計軟體繪制原理圖及印刷電圖,並送廠製作卡電:智能通信卡硬體製作和can總晶元調試;編寫通信卡控制及can總通信匯編語言程序並編譯;在superice16模擬器上在模擬調試控製程序;連接系統控制卡,模擬調試can總通信程序;程序燒入eprom晶元,進行系統eprom模擬調試;系統驅動程序及測試軟體調試。
  6. The tristate driver circuit that interfaces with the main distributing frame and the transmit / receive filters. the drivers and filters are part of the port grouping

    與主配和發送接收濾波器的三態驅動電。驅動器和濾波器都是埠分組的一部分。
  7. The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module

    數據採集模式實現部分的大部分工作是在前上完成的,後主要是一些外圍電。前採集卡上從物理上來說主要有四塊電:符合電,數據流控制器電, sdram陣列和系統總組成。後採集卡從總體物理上主要有四塊電組成: 485串列通信電, adc控制電,心電數據處理電和門控信號產生電
  8. This card largely depends on three integrate chips to fulfill its function : 1 ) nic control main chip, corresponding the mac sublayer of ethernet, to realize csma / cd media access protocol, manage the sending and receiving buffers integrated on the chip and provide motherboard pci interface. 2 ) serdes ( serializing and deserializing ) chip, corresponding pcs and pma sublayers in ethernet, mainly to complete 8b / 10b coding and convert 10 bits parallel data to serial data, and convert them again at the receiving end. 3 ) fibre transceiver unit, completing light - electrical conversion of seri

    該網卡主要由3塊集成的晶元完成其功能,分別是i )網控制主晶元,對應于以太網的mac子層,主要完成csmaicd質訪問協議,管理片上集成的發送和接收緩沖區,並提供和主p0總: b ) s rd s (串列解串列化器)晶元,對應于以太同的pcs和pma子層,主要完成sb lob編碼並將10位并行的數據轉換為串列數據,在接收端完成相反的功能:涌)光纖收發器,完成串列數據的光電轉換功能。
  9. Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function

    本文在簡單的論述了pc並口協議( epp )與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上,給出了基於dsp的arinc429通訊的設計方案:對通訊中各模塊的功能和應用以及構成數據轉換主體的總晶元hs - 3282的工作原理做了說明;紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊模塊的硬體結構設計,其中,對數據緩沖電、數據傳輸速率選擇電、邏輯控制電等各關鍵點做了重點紹;具體闡述了軟體設計思想及流程圖,包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電等方進行了模塊的軟、硬體調試;最後,給出了測試結果,對研製工作做了總結,對本設計的優缺點各做了評述。
  10. The configuration that uses ieee - 13 94 to control a vxi system is introduced. chapter 2 describes the resource manager application of message - based device 13 94 - vxi controller and the mechanism of register - based device arbitrary waveform generator ( awg ). the key technology of interface circuit and direct digital synthesis in awg module is discussed explicitly

    本文先對vxi總技術進行了概略的紹,在此基礎上,對一具體的vxi寄存器基任意波形發生器模塊進行展開,紹了任意波形發生器模塊與vxi機箱背通訊的部分及波形發生機理的核心部分的直接數字合成技術。
  11. It provided not only some control signals that measure circuit need but also counters used for analog digital conversion. the calculation of data is accomplished by means of the application software

    在硬體電,本課題採用專用晶元pci9054實現測量與計算機pci總,採用cpld晶元isp2128實現測量儀的數字控制部分功能。
  12. This thesis gives the design of an airborne datum communication board based on arinc429 bus, which is adopted dsp as controller, utilized bus interface chip hs - 3282 and use self - designed 429 electronic conversion circuit, then form a simple structure datum communication board with high dependability

    該通訊實現了pc並口( epp )與arinc429協議間的通訊,採用dsp控制,利用arinc429總晶元hs - 3282和自行設計的電平轉換電,構成了一款結構簡單、可靠性高的數據通訊
  13. The paper studies deeply into the design of systems based on pci bus and dsp, including the design of interfacing circuit board and the device driver, and works out the circuit board

    本文對「基於pci總和dsp的數據採集與處理系統」的設計方法,從總體上進行了深入的探索:包括設計與實現,設備驅動程序的編寫方法等。
  14. The task in the paper comprises two parts. the software design procedure works as follow, program the drivers for module on pc with cvi, generate the corresponding ddl and then edit the test serial and invoke the ddl by designing soft panel with vc + + 6. 0. thus facilitate users to control module to conduct high speed data test. the hardware design procedure works as follow, design vxi message based interface circuit and plesio - fdc circuit with fast data transport function on xc2vp30, a virtex - ii pro series fpga chip designed by xilinx company which integrates power - pc processor

    筆者負責的工作包括軟體設計和硬體設計兩部分:軟體設計是用cvi工具編寫模塊在pc機上的驅動程序,生成動態連接庫,再用visualc + + 6 . 0設計軟,實現測試矢量的編輯和動態連接庫的調用,讓用戶很方便地控制模塊進行高速數據測試;硬體設計是在xilinx公司的一片集成了power - pc處理器的virtex - iipro系列fpga晶元xc2vp30上完成vxi總的消息基設計和具有快速數據傳送功能的準fdc電[ 1 ] [ 2 ]設計。
  15. Based on s698 technology, obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller, etc. the bus interfaces is composed of i2c spi magnetic card interface and ic card interface. obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition

    Obt - devsys - s698是s698系列嵌入式處理器開發中的一員,其上包括:具有32 64 - bit浮點運算單元的32 - bit嵌入式處理器,主頻160mhz , sram存儲器, flash存儲器具有三uart,一ps 2, led發光二極體控制電,中斷操作按鈕其外擴總包括i2c總spi總磁卡智能卡等。
  16. In this plan the paper presents a discussion of the principle and function of communication power firstly. finally it concludes that the technique routine of plan consists of expanding a can bus interface based on a embedded development board

    在總體方案里,對通信電源監控系統的作用和原理進行了討論,確定了以嵌入式核心為基礎,擴展can總的嵌入式遠程監控系統( ucremm )的技術和系統結構框圖。
  17. Chapter one summarizes the main content and the significance of the research ; chapter two introduces pci bus and 1553b bus in detail ; chapter three gives a general presentation of the design principle and introduces the pci bus interface chip s5920 and 1553b bus protocol chip bu - 61580 in detail, which make a basis for the hardware and e software design in the following chapters ; chapter four shows how to design the board " s hardware by using pci bus interface chip s5920 and 1553b bus protocol chip bu - 61580 ; chapter five deals with the concept and design method of vxd ( virtual device driver ), as well as the communication method between the user " s application and the device driver ; the last chapter, chapter six mainly puts forward some suggestions on how to improve the system

    在第一章概述了本文的主要研究內容以及本課題的意義所在;在第二章分別詳細紹了pci總和1553b總,在第三章從總體上紹了系統的設計思並分別詳細紹了pci總晶元s5920和1553b總協議晶元bu - 61580 ,這些內容為第四章硬體設計和第五章軟體設計作了鋪墊;在第四章具體說明了如何利用pci總晶元s5920和1553b總協議晶元bu - 61580來進行的硬體設計;在第五章說明了虛擬設備驅動程序( vxd )的概念和設計方法,同時也紹了用戶應用程序的設計過程及其與驅動程序間的通訊方法;在最後一章總結了本文的工作並對本設計的改進工作提出了幾點建議。
  18. This thesis discusses the technique on the interface of data acquisition board based on pci bus. contrast has been made between the above two schemes, and finnaly the paper adhibits the second scheme - - plx9054 to design the interface circuit based on pci bus, make the interface testing board and also play the appropriate driver codes for the board

    本論文對基於pci總的數據採集卡的技術進行了探討和研究,對兩種方案進行了比較,並採用第二套方案? ? plx公司的專用晶元plx9054 ,設計了基於pci總,製作了實驗,並編制了相應的驅動程序。
  19. In the multi - module mode both trig signal and reference clock are used for synchronization. the functional module supports dma with the dsp, which frees the dsp ' s core processor and entitles the real - time digital signal processing

    在數據傳輸方無論是通過外部總還是數據鏈,功能模塊與dsp之間都支持dma方式,解放了母處理器的核心運算單元,使實時信號處理成為可能。
  20. Through analyzing the results, we expatiate the feasibility of using dsp to implement digital signature. in hardware design, tms320c50 chip is chosen as the core processor and electrical periphery circuit is designed on basis of it. the function and connection information of digital signature electric circle is presented in detail in this report. at last, the validation software of signature is accomplished in computer. we run the whole system to get the result of digital signature and its validation, thus verify the correctness of the signature and the validity in identifying attack

    本次設計在硬體上採用的核心處理晶元為tms320c50 ,在熟悉此晶元的內部結構的基礎上,設計了處理器晶元的外圍功能模塊輔助電,製作了簽名電和硬體,本文具體給出了數字簽名電各部分電塊的功能和接情況。最後,在計算機中編寫了簽名驗證軟體,並給出運行整個系統得到的對數據「簽名」和對「簽名驗證」的結果,對數字簽名結果的正確性和識別攻擊的有效性進行了驗證。
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