編輯設計 的英文怎麼說

中文拼音 [biānshè]
編輯設計 英文
design by editing
  • : Ⅰ動詞1 (編織) weave; plait; braid 2 (組織; 排列) make a list; arrange in a list; organize; gr...
  • : Ⅰ動詞(編輯; 輯錄) collect; compile; edit Ⅱ名詞(整套書籍、資料的各個部分) part; volume; division
  • : Ⅰ動詞1 (設立; 布置) set up; establish; found 2 (籌劃) work out : 設計陷害 plot a frame up; fr...
  • : Ⅰ動詞1 (計算) count; compute; calculate; number 2 (設想; 打算) plan; plot Ⅱ名詞1 (測量或計算...
  • 編輯 : 1. (加工整理) edit; compile 2. (做編輯工作的人) editor; compiler
  • 設計 : devise; project; plan; design; excogitation; layout; layout work; styling
  1. This system realizes intelligent design of coordination relation and edits coordinate charts easily and efficiently through alternant compilation

    開發出基於知識的自動決策系統,該系統通過交互,實現了協調關系的智能化輔助決策和協調圖表的快速
  2. Based on the role of journal of higher school, the author expounds the function of journal s editor in bringing forth the achievements of academic scientific research and teaching to the society, and further analyzes the role of journal ' s editing staff in teaching and scientific research, that is, the journa1 editor is the creative brainworker - stylist and producer, the special master - master of teachers, and the erudite professional - scholar and specialist

    摘要從高校學報的作用出發,說明學報在把高校科研成果、教學成果向社會推介時的作用,從而分析學報人員在教學科研活動中扮演的角色:學報是創造性智力勞動的從事者師與製作師;是特殊之師人師之師;是知識廣博的專業人才學者與專家。
  3. By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure. as followed, this paper depicted design details of intelligent instrument " s hardware, it included the design of interface circuit, data commutations and digital logic of dsp, mcu, internet ' s chip and isp ' s apparatus etc., and have designed schematic map and circuit. so it accomplished the full design of hardware / software of the new type intelligent instrument

    本文具體給出了新型智能儀器硬體結構及實現,描述了智能儀器硬體細節,包括數字信號處理器、單片機、 internet接入晶元、可程數字/模擬器件等在新型智能儀器中的介面電路、數據通信和數字邏等,詳細地給出了原理圖和電路圖;給出了新型智能儀器的軟體細節,從而完成了新型智能儀器完整的軟硬體
  4. In the logic design, the fundamentals and characteristics of ieee std. 1149. 1 specification and usb protocol are introduced first of all. according to altera ’ s fpga cyclone, it analyzes the architecture and jtag instructions of boundary scan test ( bst ). then the dissertation analyzes how to program cyclone device and offer the scheme of the design which is realized in verilog hdl by modelsim and quartus ii software

    在介面邏中,首先分析ieee1149 . 1標準和usb協議,理解邊界掃描測試和usb數據傳輸的工作方式,然後針對altera公司的fpga器件cyclone ,通過分析它的邊界掃描測試結構和各種jtag指令,研究它的程過程和程特點,並提出方案。
  5. The company is a matter of professional re - produced video product design groups, companies established in 1997, bing on " efficient, pragmatic, self - confidence, i solemnly declare " entrepreneurship, after four years of growth, has mastered the television advertisements taken, recorded, and compiled 3d integration of advanced technology with a moment of the latest industry dynamics, constantly seeking innovative, rich in the spirit of professionals with various professional camera box machines, non - linear editing equipment class digital compression equipment, like high - quality creative, sophisticated quality of the production, enterprises and individuals to strive for excellence fuel

    本公司是一家專業重事影視產品製作的團體,公司創建於1997年,秉存「高效、務實、自信、律己」的企業精神,歷經4年的成長,已掌握影視廣告攝、錄、三維一體的先進技術,擁有一批時刻把握行業最新動態,不斷追求創意、富有開拓精神的專業人才,配備各類專業攝箱機、非線形備,一流數碼壓縮備,願以高品位的創意,精良質素的製作,為追求卓越的企業及個人推波助瀾。
  6. It is an important character that using hdl describes function and behavior of logic device or system hardware

    使用硬體語言來描述邏器件及系統硬體的功能和行為是硬體描述語言方法的一個重要特徵。
  7. Programmable logic design on pci9054 local bus control

    9054本地總線控制可程邏
  8. And according to programming in the fpga, the logic circuits of image intensifying and stereoscopic display are designed

    並對fpga程,了圖像增強和立體顯示的邏電路。
  9. The content to assign for the editable design region

    要為可編輯設計區域分配的內容。
  10. An editable design region contained within the design - time view of the control

    控制項的時視圖中包含的可編輯設計區域。
  11. And pick - up the information system needed, vectorization and design according to themes, and the output of productive maps by arcview gis3. 2 combining with the research achievement of the internet - bar management presentation of taian city after correction, matching, mosaic, convolution, resolution, making dom etc. then, the integer design and the particular design have completed and the functions of inquiry, editing, statistics and analysis to internet - bar information have realized

    通過糾正、配準、鑲嵌、濾波、融合等工藝製作正射影像圖( dom ) ,結合泰安市網吧管理現狀的調研結果,運用arcviewgis3 . 2軟體對遙感正射影像提取出系統所需要的信息,分層矢量化和分層,輸出成果圖。在此基礎上,運用arcview3 . 2軟體進行泰安市網吧地理信息系統的整體和詳細,實現對網吧信息的查詢、、統和分析等功能,並由此為公安、文化、工商等泰安市網吧管理行政部門提出合理化建議。
  12. It put out the system requirements from the whole structure, function structure, developing mode, user management, the design of software and database, safety design, system running efficiency, developing plan, etc. it put out the basic graphics operation, the module building and editing of the electrical network, the devices records and function management the devices operating management, the function producing the electrical subject chart, the outside interface function, the in - out function and webgis, etc. it discusses some advanced functions including the theory loss and practical loss computing of the distribution line, the reliability basic data producing and conversing tools, power cut management, the load supplying from other ways, the repairing management on user fault reports, th e new load installing assistant function, the management of hanging the cards and simulating operation, the monitonng and analyzing management of the running information, load monitoring and load density analyzing function and so on

    從系統總體結構,功能結構,開發模式,用戶管理,軟體和數據庫,安全性,系統運行效率,開發劃等方面滿足了系統的總體要求;系統實現了基本圖形操作,電網建模與備臺帳及運行管理,備操作運行管理,電力專題圖生成,外部介面,輸入輸出, web - gis等基本功能;系統還具有配電線路理論線損算及實際線損算,可靠性基礎數據生成和數據轉換工具,停電管理,負荷轉供功能,用戶報修管理,用戶報裝輔助,掛牌管理和模擬操作,運行信息分析監控管理,負荷監控及負荷密度分析等高級功能:並能從運行方式,用戶權限,運行日誌三個方面闡述本系統的管理方式。系統總體結構合理,功能及介面齊全,配置擴展方便,可操作性強。
  13. 4 lee c y, lu e h, lee j y. bit - parallel systolic multipliers for gf fields defined by all - one and equally - spaced polynomials. ieee trans. computers, 2001, 50 : 385 - 393

    近些年來,有限場數值運算被廣泛應用在碼理論算機密碼數字訊號處理,邏,和隨機數產生器等領域上,受到相當大注意。
  14. Then the concept and logic of the database was designed. after classifying the data, standardization and coding, a database including such data types as text, figures and tables was built

    以此為依據,進一步進行數據庫的概念與邏,經據分類碼、數據規范化等數據預處理,建立了一個包含文本、圖形、表格等數據類型數據庫。
  15. Based on that, furthermore, the concept and logic of the database was designed. after classifying and coding of the data, a spatial database including such data types as text, figures and tables was built

    以此為依據,進一步進行數據庫的概念與邏,經過數據分類、碼等的處理,建立了一個包括圖形、文本、表格等數據類型的空間數據庫。
  16. Abstract : analyzed mechanics for vibration of photoelectric encoder and its influence, introduced the ordinary method for vibration - reduced, based on this, a new designing method for vibration - reduced of photoelectric encoder is put forward based on asynchronous - circuit designed, and a application - example is given

    文摘:分析了光電碼器的振動機理及影響,介紹了目前使用的減振方法,並在此基礎上,提出了一種基於異步邏的光電碼器減振電路方法,給出了其具體的應用事例。
  17. The vxibus c - size and i, q channels are employed in this module design, and the sampling rate in each channel reaches 500mhz. the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ). the timing and logic function are fulfilled by fpga. after the disscusion of signal adjusted, the detailed scheme of this module design have been showed. in this design, there is much logic function design, and it is very strict with the hardware language program. so the basic flow of hardware program design and several very important methods of high speed logic function design, which is described by vhdl, are introduced. also, expatiated the inner modules structure of fpga for forepart circuit, the keystone and difficulties of the design. the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system, and it is very important. the timing simulating results of several pivotal modules are depicted. high - speed signal paths are terminated to match the characteristic impedance. the design undergoes integrity analysis and software simulation

    在本模塊的中,有著大量的邏,對硬體語言程序的寫要求比較高,因此,文中介紹了硬體程序的基本流程,以及幾種基於vhdl硬體語言在高速邏中非常重要的方法。同時闡述了本模塊的前端fpga的內部模塊結構,的重點、難點,並給出了重要模塊的時序模擬結果。高速pcb的也是目前實現高速數據採集系統的難點和重點,文中詳細的闡明了高速pcb中的注意點,以及作者在本模塊時的經驗和心得。
  18. With the fast development of the field programmable gate arrays ( fpga ), the pci ipcore has been offered by a great many manufactories, and then the engineers can integrate the users ’ logic and pci ipcore into the fpga chip, thus the simulations and the verifications of the user ’ logic can be done in the top level. so the engineers can develop pci productions with using ipcore much faster than using special chip of pci interface, and also can shorten debug periods, highly advance the integration of the pcb board

    隨著fpga (現場可程門陣列)技術的快速發展,很多製造廠商都開始提供pci介面核邏( ipcore ) ,者可以將pci用戶邏和pci核邏集成到fpga裏面,並且可以在頂層通過模擬來驗證pci介面以及用戶邏的正確與否,這樣較之使用那些pci專用介面晶元,使用ipcore就可以大幅度的提高調試速度,縮短開發周期,提高電路板的集成度和系統的性能。
  19. During the implementation of mpeg - 2 encoding equipment, a lot of logic, especially the high speed design, are need to implement the associated syntax and control function, which is the design emphases and difficulty

    在mpeg - 2碼器的實現過程中,需要許多邏實現相關的語義和控制功能,而且都是需要高速的邏實現,是硬體的難點和關鍵。
  20. Secondly, the sub - function blocks of fft ( fast fourier transform ) are finished in max + plus ii software platform, and each of them has been designed carefully and simulated in the software

    然後用max + plus軟體平臺程實現快速傅立葉變換的各個軟體模塊,並進行了大量的邏和軟體模擬。
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