緩沖電容器 的英文怎麼說

中文拼音 [huǎnchōngdiànróng]
緩沖電容器 英文
buffer capacitor
  • : Ⅰ形容詞1 (遲; 慢) slow; unhurried 2 (緩和; 不緊張) not tense; relaxed Ⅱ動詞1 (延緩; 推遲) d...
  • : Ⅰ名詞1 (有電荷存在和電荷變化的現象) electricity 2 (電報) telegram; cable Ⅱ動詞1 (觸電) give...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 電容器 : capacitor; condenser; current condenser; electrical condenser
  • 電容 : electric capacity; capacitance; capacity
  1. However, the h - bridge maglev chopper has serious switching losses, so as to have snubber circuit ; there is high emi with the chopper

    然而, h -橋斬波開關損耗大,需要添加網路,磁干擾十分嚴重;對供源有反向擊,易造成供源和濾波的損壞。
  2. A common data acquisition card can be used on laboratory virtual instrument engineering workbench through designing the external interface between labview and common date acquisition card on the software design ; used the idea of the double buffer and direct memory access, a real time data acquisition and logging about the succession, big capacitance leakage current is realized ; a digital filter is designed to filter high frequency signals

    在軟體設計上,設計了與普通數據採集卡的介面,實現了在labview環境中應用普通數據採集卡的功能;運用雙和內存直接映射的設計方法實現對連續、大量泄漏流信號的實時採集和存儲;設計了數字濾波對採集后的原始數據濾去高頻干擾。
  3. In this part, the high - frequency series inverter with resonant pole capacitor is introduced mainly. the current - exchanging processes of the inverter in different working modes are analyzed, how to reduce the switching loss is discussed, and the calculating methods of snubber capacitor c, factor angle switching frequency and pulse width pw are given in optimum switching process. and results of simulation and experiment verify the validity of theoretic analysis

    接著重點研究了含有諧振極無損的逆變,對其換流過程中的不同工作狀態進行分析,討論了如何減小逆變的開關損耗,給出了最佳工作狀態下c 、感性角、開關頻率、觸發脈的脈寬pw的詳細計算方法,並通過大量的模擬和實驗波形證明了理論分析的正確性。
  4. Output buffer is realized by the feedback application of amplifier which can drive big load capacitor. the av of amplifier is more than 70db, phase - margin of it is more than 70 degree, psrr of it is more than 50db

    單位增益是具有驅動大負載能力的運算放大的反饋應用,該運算放大的增益大於70db ,相位裕度大於70度。
  5. Our optimization goal is not only to maximize the tolerance of the circuit to process variation, but also to minimize the total area of clock buffers

    我們最佳化的目的,不僅是要最大化製程變異忍度,並且要最小化整個路時鐘的總面積。
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