觸發器組 的英文怎麼說

中文拼音 [chù]
觸發器組 英文
ffg fli flogroup
  • : Ⅰ動詞1 (接觸) touch; contact 2 (碰; 撞) strike; hit 3 (觸動) touch 4 (感動) move sb ; sti...
  • : 名詞(頭發) hair
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • : Ⅰ名詞1 (由不多的人員組成的單位) group 2 (姓氏) a surname Ⅱ動詞(組織) organize; form Ⅲ量詞(...
  • 觸發 : detonate by contact; touch off; trigger; strike
  1. The mos dynamic shift registers do not consist of flip-flops, but of inverters.

    MOS動態移位寄存不是用觸發器組成,而是用反相成。
  2. The cosmic ray telescope contains 3 detectors, a trigger electronics, a gps receiver and a timer card in a computer

    宇宙射線望遠鏡主要是由三件探測、一電路、一個全球定位系統接收和一部配備計時介面的電腦成。
  3. Voltage segment network constituted by electron switch of bta and controlled by single chip microcomputer constitutes a new fast electronic regulator. for bta cross zero touch off, sine wave which is exported is integrity. a new way to generate stable ac current is found with feed back control system by single chip microcomputer. so a new high power ac current regulator is developed

    採用單片機控制雙向可控硅作為電子開關所成的電壓分節網路,成新穎快速的電子調壓;由於雙向可控硅過零,所以其輸出是不失真的完整正弦波;再用單片機成反饋控制系統,從而找到了交流穩流的新方法,研製出一個大功率交流穩流電源
  4. Abstract : voltage segment network constituted by electron switch of bta and controlled by single chip microcomputer constitutes a new fast electronic regulator. for bta cross zero touch off, sine wave which is exported is integrity. a new way to generate stable ac current is found with feed back control system by single chip microcomputer. so a new high power ac current regulator is developed

    文摘:採用單片機控制雙向可控硅作為電子開關所成的電壓分節網路,成新穎快速的電子調壓;由於雙向可控硅過零,所以其輸出是不失真的完整正弦波;再用單片機成反饋控制系統,從而找到了交流穩流的新方法,研製出一個大功率交流穩流電源
  5. The system is composed of parallel microprocessor interface, spwm generator, deadtime compensation module and pulse blocking module. the pwm pulse signal is automatically generated as soon as the control variables ( s, x ) input from microprocessor

    該系統由并行微處理介面、 spwm脈沖生模塊、死區補償模塊和脈沖封鎖模塊成,可以按照微處理給定的控制變量、自行產生脈沖。
  6. The trigger electronic module consists of 3 discriminators and a coincidence unit which performs a 2 - out - of - 3 logic gate. hence either 2 detectors or 3 detectors receiving cosmic ray signal will trigger daq

    電路模由三個鑒別和一個與門電路成。當有兩塊或以上的探測同時產生訊號,該電路便會數據收集。
  7. The main circuit is consisted of 18 thyristors circuit and protection circuit. with the help of control subsystem, it can get the output of low frequency voltage ( current ) with the shape of sine wave ; the core of the control subsystem is the cpu of 87c196kc, and the synchronization circuit, the pulse - widen circuit, and the power - enlarged circuit form the accessorial subsystem of the control system. it possesses all the functions of digital triggering, digital tuning, analog / digital conversion ; the input transfer can isolate the input and output ; and the circumfluence reactor can reduce the circumfluence

    主迴路採用由18個晶閘管成的三相零式電路,並輔以晶閘管的保護電路,通過控制可以得到低頻正弦波的電壓(電流)輸出;控制迴路主要以87c196kccpu為核心,其外圍電路包括同步電路,脈沖拓寬電路,功率放大驅動電路等,完成了數字、數字調節、模數轉換等功能;進線電源變壓具有變壓和隔離作用;環流電抗則實現了有效抑制主迴路瞬時脈動環流的功能。
  8. Vecon - con system is triggered by 4 infra - red sensors along the selected lanes with 2 in pairs. false trigger by wind shield and container - type trucks are dalian yaowan phase ii screened out and the system captures and recognizes container numbers, country codes, iso codes automatically in less than 0. 012 seconds from trigger till image capture. the captured images are transmitted to the tos for processing which enhances efficiency and ensures security while maintaining manpower at the minimal

    Vecon - con透過四個紅外線對射敏應進行,兩個一並列于車道上,具備防止集裝箱型卡車大型集裝箱車拖頭等誤,系統接收到信號后,自動抓拍集裝箱號碼國家代碼箱形代碼,抓拍的圖像會被傳送到碼頭控制系統中心進行后臺處理,該系統由到抓拍只需不多於0 . 012秒,整個系統大大提高了口岸工作效率,並減低了人力物力的耗用,為港口碼頭的管理提供了更加高效可靠的處理手段。
  9. Ensure that the content source variable defined in each component portlet, trigger handler, and content adapter is the same

    :保證定義在每個件( portlet ,處理程序和內容適配)中的內容源變量相同。
  10. For example, video cameras monitoring an assembly line can feed video data into a universal server database that can detect anomalies such as defects and trigger corrective action, thus improving product quality at a lower cost

    例如,監視裝生產線的攝像機能把視頻數據饋送到萬能服務的數據庫,該數據庫能探測出異常,如缺陷,並能糾錯動作,從而以較低的成本改進了產品的質量。
  11. If you re migrating to ibm db2 universal database from a database that supports bit and boolean operations and functions, you may be wondering how to handle these types and functions in db2. our author offers a method that includes table creation with columns of the bit - like or boolean data types using constraints or triggers, and a set of user - defined functions to support bitwise and boolean operations that imitate bit or boolean data - type behavior

    本文作者提出了一種方法,這個方法中包括使用約束條件或創建的表,表中包含類似於位( bit - like )的數據類型的列或布爾數據類型的列;該方法還包含一用戶定義函數( udf ) ,用於支持模仿位數據或布爾數據類型的行為的逐位運算和布爾運算。
  12. This article offers a method that includes table creation with columns of the bit - like or boolean data type, using constraints or triggers, and a set of user - defined functions udfs to support bitwise and boolean operations for columns that imitate bit or boolean data type behavior

    本文將提供一種方法,該方法包括使用約束條件或創建了一個表,表中包含類似於位( bit - like )或布爾數據類型的列;該方法還包括一用戶定義函數( udf ) ,用於支持模仿位數據或布爾數據類型的行為的逐位運算和布爾運算。
  13. The whole pwm circuit contains two subcircuit, the front - end is pwm module that make up of the counter that based on nine mosfet true - single - phase - clock d flip - flop ; the back - end is demodulated module, which is consist of a three order chebyshev low - pass filter used trans - conductor capacitor. all the subcircuits are simulated. at last, an approving simulated result of the whole circuit is given too

    在調制部分,利用九管單相時鐘d構成計數,並由此成了脈沖寬度調制電路,同時給出了在典型溫度下的模擬結果;在解調部分,介紹了低通濾波從無源到有源的設計方法,設計了三階切比雪夫低通跨導電容濾波,同樣給出了相應的模擬結果;最後,作為將脈沖寬度調制電路和濾波作為整體電路,以脈沖調頻波為輸入進行了模擬,取得了令人滿意的結果。
  14. Step power is the key for step magnetic potential, the pulse width modulate technology that selects the triangle wave as the carrier and ladder sine wave as the modulate wave is researched, furthermore the design of the actuator drive adopts dsp as the digital controller is introduced

    步進電源是產生步進磁勢的關鍵,文章研究了三角波為載波,階梯正弦波為調制波的脈寬調制技術,進而介紹了採用dsp成全數字控制,完成步進電源的執行驅動的設計。
  15. 4. demonstrating the structure and design of the counter + delay - line module, by which the pulse waveforms with given pulse delay and pulse width delay can be generated

    4 .設計計數+延遲線模塊的成及方案,並據此實現根據信號產生的具有一定脈沖延遲和脈沖寬度的脈沖波形數字信號。
  16. The whole circuit consists of a multiplier, an error amplifier, a comparator, a rs flip - flop, an and gate, and an inverter, etc. the electronic circuit simulator cadence is utilized to practice the detailed functional simulation of the general circuit and the subsystem circuits

    整個電路由模擬乘法、誤差放大、比較、 rs、與門和倒相等基本單元電路成,採用工作站上的大型ic設計軟體cadence進行模擬。
  17. Note that you might not be able to specify a correlation name for an option depending on the combination of activation time and the particular operation that causes the trigger to fire

    注意,您也許無法指定其中的一個correlation name ,因為它依賴于引起啟動的特定操作和激活時間的合。
  18. The paper analyses its key circuit and software program structure. this full - digital controller is made up of dsp and implements single neuron adaptive pid computation, current pi computation, logical determination, pulse - fire and procession of protective signal etc. it also improves the reliability and availability of this control system

    本課題對控制主要的電路結構及程序結構進行了分析,以dsp為核心成的全數字式控制完成了電流pi演算法計算,單神經元自適應pid演算法計算、邏輯判斷、脈沖以及系統保護信號的處理等,提高了控制的可靠性和可操作性。
  19. Circuit design is the basis of design of demultiplexer. speed, power and chip area are the main factors that should be considered in circuit design. every circuit structure has its merits and drawbacks, e. g. cmos logic family has a slower speed, but lower power, smaller area, scfl ( source couple fet logic ) family has a higher speed, but higher power, larger area. we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors. flip - flop is the fundamental element of demultiplexer, setup time and hold up time are key factors, which influence the speed of circuit, thus the design aim is how to reduce them. in this thesis we place emphasis on the design of scfl latches

    速度、功耗、面積是電路設計要考慮的主要因素,不同的電路形式具有不同的優缺點,如cmos互補邏輯電路功耗低,面積小,速度相對較慢; scfl (源極耦合fet邏輯)電路速度高,功耗和面積較大。所以要針對具體設計需要選用適當的電路形式或其合結構,以滿足設計要求。是分接的基本成單元,建立時間和保持時間是影響電路速度的關鍵,所以減小建立時間和保持時間是設計的主要目標,本文著重介紹了scfl鎖存的設計和優化方法。
  20. The static analysis works by traversing your code, starting at a set of methods called triggers

    進行靜態分析時會遍歷您的代碼,從一稱為「」的方法開始。
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