跨導器 的英文怎麼說

中文拼音 [kuàdǎoqì]
跨導器 英文
transconductor
  • 跨 : 動詞1 （抬起一隻腳向前或向左右邁） step; stride 2 （兩腿分在物體的兩邊坐著或立著） bestride; stra...
  • 導 : 動詞1. （引導） lead; guide 2. （傳導） transmit; conduct 3. （開導） instruct; teach; give guidance to
  • 器 : 名詞1. （器具） implement; utensil; ware 2. （器官） organ 3. （度量; 才能） capacity; talent 4. （姓氏） a surname
  1. A complementary input stage, which consists of a p - channel pair and a n - channel pair, was used in the circuit, so that the common mode input range can extend from rail to rail. a dcls is used to shift the n - transistor curve leftward to overlap the p - transistor curve properly and keep constant transconductance in the whole common mode input range

    輸入級採用pmos差分輸入對和nmos輸入差分對並聯的結構，從而實現共模輸入范圍擴大到電源的正負兩端，並且通過兩個源級跟隨器平移nmos輸入管跨導曲線，使nmos輸入管和pmos輸入管跨導曲線的適當交疊，從而保持了這個輸入級的跨導在整個共模輸入范圍內保持恆定。
  2. The factors limiting the frequency band of the wide - band amplifier are introduced. through analyzing the effects of the intrinsic parameters and parasitical on the frequency characteristics, a method of improving fr of mosfet by using short channel device and making mosfet work at the saturation region through raising vgs is put forward ; the effects of different kinds of circuit configurations on the frequency characteristics and the junction voltage on the voltage pattern circuit, current pattern circuit and frequency characteristics are analyzed. according to the linear theory of transconductance which is applied in the bit circuit, the current pattern amplifier circuit, current transfer circuit and output circuit which consist of mosfet and the wide - band amplifier composed of them are put forward

    介紹了限制寬帶放大器頻帶寬度的因素，通過分析mosfet的本徵參數、寄生參數對頻率特性的影響，提出了採用短溝器件、使mosfet工作在飽和區、抬高柵源電壓等提高mosfet特徵頻率的方法；分析了不同電路組態對放大器頻率特性的影響、節點電壓對電壓模電路、電流模電路頻率特性的不同影響，根據應用於雙極晶體管電路的跨導線性原理，提出了採用mosfet構成的電流模放大電路、電流傳輸電路、輸出電路以及由它們所組成的寬帶放大器，獲得了良好的頻率響應。
  3. The three - order modulator has a 2 - 1 cascaded structure and 1 - bit quantizer at the end of each stage, the modulator is implemented with fully differential switched - capacitor circuits. and then, the discussion will begin by exploring the design of various circuit blocks in the modulator in more detail, i. e., ota, switched - capacitor integrator, quantizer, two - phase non - overlapping clock signal, etc., at the same time, these circuits will be simulated in spectre and hspice. at last, the whole cascaded modulator will do behavioral level simulation by matlab soft and simulink toolbox

    本論文中，首先介紹模數轉換器的各種參數的意義，以及一階sigma - delta調制器和高階sigma - delta調制器的原理;給出解決高階單環sigma - delta調制器不穩定性的方案，引入級聯結構調制器，特別針對級聯結構調制器中的失配和開關電容積分器的非理想特性進行詳細的討論;本設計的sigma - delta調制器採用2 - 1級聯結構和一位量化器，調制器採用全差分開關電容電路實現;同時對整個調制器的各個模塊進行了電路設計，包括跨導放大器、開關電容積分器、量化器、兩相非交疊時鐘等，並利用hspice和spectre模擬工具對這些電路進行模擬測試;最後，利用matlab軟體和simulink工具對整個級聯調制器進行行為級模擬。
  4. Detail specification for electronic components. semiconductor integrated circuit - cf3080 type transconductance operational amplifier

    電子元器件詳細規范.半導體集成電路cf 3080型跨導運算放大器
  5. If you need a programmable dynamic current source, find out about operational transconductance amps. most of the problem is figuring out when you need a programmable dynamic current source

    如果需要一個可編程的動態電流源，找出運算跨導的放大器，大部分的問題就明白了。
  6. Using a strained si layer as a channel in cmosfet may increase the mobility of carriers and thus enhance the device ’ s performance considerably such as transconductance and cutoff frequency

    在sige虛擬襯底上生長應變si層做器件溝道，將大大增加載流子的遷移率，從而提高器件的跨導和其他性能。
  7. The innovation of the dissertation is indicated as follows : in the discussion of the ctrl _ gm sub - block, the transconductance stability of operational transconductance amplifier is deeply studied

    本論文的創新之處在於:在對ctrl _ gm模塊的論述中，論文對運算跨導放大器（ ota ）的跨導穩定性進行了較為深入的研究。
  8. The hetrojunction device fabricated with sige material has shown great advantages over bulk sample in many aspects : higher carrier mobility, larger transconductance, stronger drive capability and hence faster circuit speed

    與體si器件相比，採用sige材料的異質結器件已經在許多方面顯示出了強大的優勢:譬如更大的載流子遷移率，更大的跨導，更強的電流驅動能力以及更快的電路速度等等。
  9. Strained - soi mosfet, which appears recently, takes both the advantages of soi ( silicon on insulator ) and sige ( silicon germanium ). it has shown advantages over bulk sample in enhanced carriers mobility, as well as higher transconductance, stronger drive capability and reduced parasitic capacitances. these properties make it a promising candidate for improving the performance of microelectronics devices

    Strained - soimosfet是最近幾年才出現的新型器件，它將soi材料和sige材料結合在一起，與傳統體硅器件相比，表現出載流子遷移率高、電流驅動能力強、跨導大、寄生效應小等優勢，特別適用於高性能、高速度、低功耗超大規模集成電路。
  10. Research and design of honeywall in honeynet

    改善跨導放大器線性化方法的研究
  11. The simulative circuits of active network elemellts and analog signal operation based on ota are induced systematically

    論文研究跨導運算放大器及其濾波器電路的原理和設計。
  12. The second generation current controlled conveyor, which is derived from current conveyor, has not only the characters of current conveyor, but also the characters of ota

    在電流傳送器基礎上發展而來的電流控制傳送器，不僅具有電流傳送器的特點，而且具有跨導的特性。
  13. After introduction of the tranlinear loop principal, the bjt current controlled conveyor has been designed by using mixed tranlinear loop voltage follower. as for modern integrated circuit, the model of mos transistor, the active resistance and the current mirror integrated circuit formed by mos transistor are introduced. the cmos current controlled conveyor has been derived from mixed tranlinear loop cmos voltage follower based on weak inversion operation

    針對現代集成電路的工藝，本文對mos晶體管的工作原理進行了簡要的敘述，討論了有源電阻和電流鏡的實現方法，並利用mos晶體管的亞閾值特性組成混合跨導線性迴路完成對應的電壓跟隨器的設計，推導出了基於cmos技術的電流控制傳送器。
  14. The thesis has done the widespread investigation and study to the domestic and foreign ’ s technologies of analogy low voltage and low power, and analyzes the principles of work, merts and shortcomings of these technologies, based on the absorption of these technologies, it designs a 1. 5v low power rail - to - rail cmos operational amplifier. when designing input stage, in order to enable the input common mode voltage range to achieve rail - to - rail, it does not use the traditional differential input pair, but use the nmos tube and the pmos tube parallel supplementary differential input pair to the structure, and uses the proportional current mirror technology to realize the constant transconductance of input stage. in the middle gain stage design, the current mirror load does not use the traditional standard cascode structure, but uses the low voltage, wide - swing casecode structure which is suitable to work in low voltage. when designing output stage, in order to enhance the efficiency, it uses the push - pull common source stage amplifier as the output stage, the output voltage swing basically reached rail - to - rail. the thesis changes the design of the traditional normal source based on the operational amplifier, uses the differential amplifier with current mirror load to design a normal current source. the normal current source provides the stable bias current and the bias voltage to the operational amplifier, so the stability of operational amplifier is guaranteed. the thesis uses the miller compensate technology with a adjusting zero resistance to compensate the operational amplifier

    本論文對國內外的模擬低電壓低功耗技術做了廣泛的調查研究，分析了這些技術的工作原理和優缺點，在吸收這些技術成果基礎上設計了一個1 . 5v低功耗軌至軌cmos運算放大器。在設計輸入級時，為了使輸入共模電壓范圍達到軌至軌，不是採用傳統的差動輸入結構，而是採用了nmos管和pmos管並聯的互補差動輸入對結構，並採用成比例的電流鏡技術實現了輸入級跨導的恆定;在中間增益級設計中，電流鏡負載並不是採用傳統的標準共源共柵結構，而是採用了適合在低壓工作的低壓寬擺幅共源共柵結構;在輸出級設計時，為了提高效率，採用了推挽共源級放大器作為輸出級，輸出電壓擺幅基本上達到了軌至軌;本論文改變傳統基準源基於運放的設計，採用了帶電流鏡負載的差分放大器設計了一個基準電流源，給運放提供穩定的偏置電流和偏置電壓，保證了運放的穩定性;並採用了帶調零電阻的密勒補償技術對運放進行頻率補償。
  15. The whole pwm circuit contains two subcircuit, the front - end is pwm module that make up of the counter that based on nine mosfet true - single - phase - clock d flip - flop ; the back - end is demodulated module, which is consist of a three order chebyshev low - pass filter used trans - conductor capacitor. all the subcircuits are simulated. at last, an approving simulated result of the whole circuit is given too

    在調制部分，利用九管單相時鐘d觸發器構成計數器，並由此組成了脈沖寬度調制電路，同時給出了在典型溫度下的模擬結果;在解調部分，介紹了低通濾波器從無源到有源的設計方法，設計了三階切比雪夫低通跨導電容濾波器，同樣給出了相應的模擬結果;最後，作為將脈沖寬度調制電路和濾波器作為整體電路，以脈沖調頻波為輸入進行了模擬，取得了令人滿意的結果。
  16. In the paper a gmc filter with a cutoff frequency of 29. 8mhz is implemented. an effective improvement is made in cmfb ( common mode feedback ) through using a differential amplifier with four inputs. transconductors are tuned through comparing two voltages, which helps to stabilize the cutoff frequency

    文中實現了跨導電容濾波器，其截止頻率達到29 . 8mhz ；採用四輸入端的差分放大器使共模反饋得到了有效的改善；通過簡單的電壓比較實現跨導器的調諧，有助於穩定截止頻率。
  17. In the chapter 4, the basic concept and characteristics about the current model circuit and transconductor ( gm ) are given. in order to optimize the performance of gmce, four linearization techniques and the design of consequently successful circuits are investigated and proposed. at last, the four linearization techniques are summarizes

    第四章討論了電流模式電路及跨導器的基本概念及性能特點，重點研究並給出了改善輸入級傳輸特性的線性程度並擴大線性范圍的四種方法，介紹在這方面比較成功的一些電路設計，總結了這四種方法的異同點。
  18. The chip is accomplished in the full cooperation with other team members, the author pays particular attention to the analysis of the whole chip architecture and three sub - block design : transconductance amplifier ( ota ), voltage reference and current reference. based on existed technologies, a new high order temperature compensated voltage reference and a creative current reference with high order temperature compensation are shown respectively. the author simulated all the sub - block and whole chip by hspice

    該晶元的設計是由小組成員共同完成，本人主要負責了總體電路的分析、聯合模擬驗證及以下三個子電路的設計: 1 、跨導放大器，詳細分析了bandgap跨導放大器輸入級的動靜態特性及其優缺點，並結合系統要求，設計了一種與cmos工藝相兼容、可替代bandgap跨導放大器的低壓共源共柵跨導放大器。
  19. After structure design aimed to high transconductance, parameters of device structure are modified in detail. the simulation results of soi nmos with strained si channel show great enhancements in drain current, effective mobility ( 74 % ) and transconductance ( 50 % ) beyond conventional bulk si soi nmosfet. the strained - soi nmosfet fabrication process is proposed with lt - si ( low temperature - si ) technology for relaxed sige layer and simox technology for buried oxide

    其次，根據器件參量對閾值電壓和輸出特性的影響，以提高器件的跨導和電流驅動能力為目的設計了strained - soimosfet器件結構，詳細分析柵極類型和柵氧化層厚度、應變硅層厚度、 ge組分、埋氧層深度和厚度以及摻雜濃度的取值，對器件進行優化設計。
  20. Using sige bicmos darlington configuration as the input stage, the input resistance is increased by the mos devices while the transconductance of sige hbts is maintained. in the same time, the equivalent input noise is controlled well because of the sige hbts ’ good noise performance in the input stage

    輸入級的設計採用sigebicmos達林頓結構，在保留sigehbt高跨導優勢的基礎上充分利用mos器件來提升運放輸入電阻，此外，基於輸入級中sigehbt良好的噪聲特性，運放的輸入參考噪聲電壓可以大大降低。
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