輸出存儲器 的英文怎麼說

中文拼音 [shūchūcúnchǔ]
輸出存儲器 英文
output storage
  • : Ⅰ動詞1 (運輸; 運送) transport; convey 2 [書面語] (捐獻) contribute money; donate 3 (失敗) l...
  • : 動詞1 (存在; 生存) exist; live; survive 2 (儲存; 保存) store; keep 3 (蓄積; 聚集) accumulat...
  • : Ⅰ動詞(儲藏; 存放) store up; save; keep [have] in reserve Ⅱ名詞1. (繼承人) heir 2. (姓氏) a surname
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 輸出 : 1 (從內部送到外部) export 2 [電學] output; outcome; outlet; out fan; fanout; 輸出變壓器 output ...
  • 存儲 : [計算機] memorizing; storage; memory; store
  1. According to this idea, this paper first introduces the basic technology to design the instrument. it includes the theory of the laser, measures to survey distance with laser, the theory of the step - motor, subsection technology of the step - motor, the working theory of the single - chip, expansion of the single - chip orderly. the following are the design of the control system of the planimeter according to the principle of the context. it consists of two parts

    最後根據前文介紹的知識先對單片機控制系統進行了硬體電路框圖設計,依據夠用原則對元件、設備的選擇進行計算、說明、選定,使系統成為擁有完整的包括a d採集、數據、 8155擴展的鍵盤顯示、 p1口及8155的pa口控制的單片機硬體控制系統電路。
  2. Applying two perpendicular polarized light states and a no - light state to express information, this new theoretical system covers : a ) whole architecture constructed from light processing, light transmission, electric control and photoelectric input and output ; b ) various computing units mainly consist of liquid crystal element and polarimeter ; c ) light bus mainly consists of interlinkage optic valves ; d ) ternary memory formed from semiconductor memory ; e ) register formed from optic fiber ring ; and i ) huge - numeral management based on the new concept of calculating path and calculating channel

    這個理論包括:光處理、光傳送、電控制、綜合的總體結構;以液晶元件和偏振為主的各類運算結構;以互連光閥為主的光空間總線;以半導體為主的三值數據結構;以光纖環為主的寄結構;以算位、算道新概念為基礎的巨位數管理方案等。
  3. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper, carried on intact summing up to the data in the system, having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram, give solution that many pieces of sdram works togetherses of realizing heavy capacity, designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus, optimize back end state machine design and urge procedure making with lower, giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices, due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal, method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo

    本文首先對數字減影血管造影( dsa )成像系統的組成結構和數據流向進行了深入研究和分析,並對系統中的數據流向進行了完整的歸納和總結,給了x線數字成像系統中的高速大容量數據通道的設計方案;在對sdram的控制方式做了深入探討后,給了實現大容量多條sdram共同工作的解決方案,在此基礎上設計了大容量幀板實現對圖象數據進行高速;通過對pci總線介面的深入研究,優化後端狀態機設計和低層驅動程序開發,給了完整的pci介面方案實現高速dma數據傳,完全可以滿足視頻傳要求;深入研究了基於大規模可編程件的數字系統設計方法,針對通用fifo使能信號漂移、數據難于建立和保持等設計難點,提了利用fpga中的鎖相環提供多個時鐘相移的信號來提高系統穩定性的解決方案,從而實現利用fifo來協調系統各模塊之間的數據高速傳
  4. The system initiation module mainly solves the system automatical self - test and initiation of the intelletual testing module ; the independent testing function of the parameters of the electric apparatus can be realized by the electric apparatus parameters testing module ; data handling module can include the following factions : visiting the database, storing the parameters of testing process, exchanging data and printing the result data

    根據控制軟體功能的需求,可對整個軟體分三個功能模塊來實現。系統初始化模塊用於實現系統自檢與各智能測試模塊的初始化;電參數測試模塊實現了電各參數獨立測試的功能;數據處理模塊包括數據庫的訪問、測試過程參數的處理,以及結果數據交換與功能。
  5. Being master control part, user controller stores, manages, display and query user information ; as slave control part, sub - user controller calculates and temporarily stores power sent from measuring module ; measuring module measures electric energy by using power meter ' s special circuit which simplifies circuit design and connects or breaks up power supply circuit by relay ; in order to transmitting data fast and exactly, rs - 485 communication standard is adopts between user controller and sub - user controller

    主控部分用戶控制模塊可、管理、顯示和查詢用戶電能信息;從控部分子用戶控制模塊計算並暫電能測量模塊功率數據;電能計量模塊採用電度表專用厚膜電路hdb6進行電能計量,簡化了電路設計,同時還利用繼電控制連接或斷開用戶的供電迴路;在主從部分間採用rs - 485通信標準實現數據快速、準確的傳
  6. A cyclic check code used to check and correct the burst error appeared in the transmission procedure of binary information sequence. it is one of the error check codes in common use for computer disc memory

    用來檢查、糾正二進制信息序列在傳過程中現的突發錯誤的一種循環校驗碼,它是計算機磁盤常用的錯誤校驗碼之一。
  7. The video signal processing circuit realizes the primary catching, filtering and signal amplifying. variable threshold binarization processing circuit and two - channel counter are designed to sample to count the output pulse signal, which is processed, deposited and displayed in microprocessor. the communication interface circuit with the computer is also designed

    視頻信號處理電路完成了原始信號的初級捕捉、濾波、視頻放大等處理,設計了浮動閾值二值化處理電路,採用兩路計數脈沖信號采樣計數,最後送入微處理進行運算處理,可實現測量值的、顯示等,並設計了與上位機的通訊介面。
  8. And the selection and design of switch - in module, switch - out module, communication module, clock module, data storage module, keys module and frequency detecting module are also discussed

    論文中還給了開關量入、開關量、通信模塊、時鐘電路、數據、按鍵電路和頻率跟蹤電路等各功能模塊的選擇方法和設計原理。
  9. All input - output devices will be linked to them via networks

    所有的人一設備都將通過網路與智能隨機們連接。
  10. A small memory unit used as a go - between for the input and output units and main memory

    一種小裝置,在裝置和主之間用作媒介。
  11. The peripheral circuit includes charge and discharge circuit of permanent magnetic actuator ( pma ), extended circuit of memory, interface circuit of keyboard and display system, and interface circuit of input and output signal

    外圍電路包括永磁機構充、放電電路、擴展電路、鍵盤和顯示介面電路、入和介面電路等。
  12. An i / o address is a memory storage location for communication between the cpu and different parts of a computer

    一個位址是處理和計算機的不同部份之間的通信的一個位置。
  13. A memory address consists of binary data being output on an appropriate bus which we call the address bus.

    一個地址是由到適宜的總線上的二進制數據所組成。這個總線我們稱為地址總線。
  14. In order to apply the system ' s real - time, this design uses a kind of fifo data memorizer, idt7204 which need not address and the data ' s input and output are independent

    為實現系統的實時性,本系統採用一種先進先的數據id竹204 ,無須地址線,且數據的入和是獨立分開的。
  15. Software design includes many aspects, such as design of interface, interrupt and clock control, monitoring, etc. sampling and accessing quickly data of chromatogram peak is an important tache to ensure analytic and real time performance of chromatograph, fifo make high - speed input and output of a / d sampling data possible, and expended memory, instead of disk, save a great deal of peak data and process parameter

    硬體系統由cpu 、 a / d 、 d / a 、顯示驅動、實時鐘五個模塊組成,軟體設計包括譜峰數據的高速採集和取、人機界面的設計、中斷和實時鐘控制、監測控制等方面的工作。譜峰數據的高速採集和快速取是保證工業色譜儀分析性能和實時性的重要環節,採用了fifo技術實現a / d采樣數據的高速,使用擴展內代替硬盤貯過程參數和海量的譜峰數據。
  16. Technique characteristics : incorporate transform with control, reduce assistant equipment ; can setup parameters through panel key in the work field, simplify for operating ; multi - switch quantity node output, fulfil the requirement under commonly controlling work - field ; all the configured parameter is saved in eerom ; adopt rs232 and rs485 communication mode

    技術特點:集變送、控制為一體,減少輔助設備;現場即可通過面板按鍵設置參數,簡單易操作;多點開關量,滿足一般控制現場;所有設置參數都在非易失的中;採用rs232 、 rs485通訊方式。
  17. The hardware achitecture of home integrated services terminal is mainly composed of the following five parts : dvb - based front - end interactive module, video and audio data processing module, output presentation module, peripheral equipment data interface module, memory management module

    其硬體結構大體可分為dvb前端交互模塊、音視頻數據處理模塊、呈現模塊、外圍設備數據介面模塊和管理模塊這五個主要單元。
  18. On the basis of analysis to the research and design of the microbrowser, this article present a tight and distinct microbrowser ' s designing and realizing scheme, which restrcitly conform to the standard of wireless application protocol, furthermore, the scheme can adapat to the low main frequency and poor computation, limited storage capacity, small view screen and limited input device of mobile terminal

    本論文在分析國內外微瀏覽研究與設計的現狀的基礎上,根據移動終端主頻、計算能力都比較小,容量、顯示屏和入設備大小也受到限制的特點,基於無線應用協議標準的規定,提了一種緊密、清晰的微瀏覽的設計和實現方案。
  19. In the description of circuit design, the emphasis is paid the following hardware modules : ad / da inverter, dsp module, external program / data memory, cpld control logic, serial communication module, power module, and so on. problems and the corresponding solutions found in the design and debug stage are discussed, too. finally, the low - level software driver design is presented in detail, including system booting, initialization of dsp registers, cpld logic and timing control, drivers for asynchronous communication fifo, and drivers for ad converter

    在電路模塊分析中,重點介紹了語音的入放大和緩沖部分、 ad da轉換、 dsp語音壓縮解壓、外部程序數據、 cpld邏輯控制、串列收發組件、電源供電以及dsp的jtag介面等等,並且給了在硬體電路設計和調試過程中的問題與解決辦法。
  20. Storage, input output

分享友人