輸出緩沖通道 的英文怎麼說

中文拼音 [shūchūhuǎnchōngtōngdào]
輸出緩沖通道 英文
buffered output channel
  • : Ⅰ動詞1 (運輸; 運送) transport; convey 2 [書面語] (捐獻) contribute money; donate 3 (失敗) l...
  • : Ⅰ形容詞1 (遲; 慢) slow; unhurried 2 (緩和; 不緊張) not tense; relaxed Ⅱ動詞1 (延緩; 推遲) d...
  • : 通量詞(用於動作)
  • : Ⅰ名詞(道路) road; way; route; path 2 (水流通過的途徑) channel; course 3 (方向; 方法; 道理) ...
  • 輸出 : 1 (從內部送到外部) export 2 [電學] output; outcome; outlet; out fan; fanout; 輸出變壓器 output ...
  • 通道 : thoroughfare; passageway; pass; enterclose; gallery; drong; tunnel; avenue; alure; way; row; key ...
  1. Based on the dsp development board, the author finishes the hardware debug about the multi - channel buffered serial port ( mcbsp ) receiving the output signal from the gps if collector and resolves the software program of the receiving buffer of the multi - channel synchronous serial data, data integration, udp datagram encapsulation and network interface driver, etc. the real - time udp datagram receiving, data frame de - encapsulation and high speed data memory are implemented, and a friend application interface with windows message is developed on the pc

    基於dsp開發板,作者完成了dsp的多串口( mcbsp )接收gps中頻接收機信號的硬體調試,並解決了多同步串口數據的接收、數據合併、 udp數據報裝幀及網路介面驅動等軟體編程。在pc端,過mfc的網路應用開發類casyncsocket實現udp報的實時接收、數據解幀譯碼、高速存貯,利用windows消息機制開發了應用程序友好界面。
  2. During this time, line buffer 2, which was presumed to be full, will empty itself into the output paths, on the right of the illustration.

    這時,行器2假定是滿載的,則向圖右邊的卸載。
  3. Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function

    本文在簡單的論述了pc並口協議( epp )與dsp之間的信方法、 cpld模塊邏輯控制應用和arinc429的訊規范的基礎上,給了基於dsp的arinc429訊介面的設計方案:對訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了訊板介面模塊的硬體結構設計,其中,對數據電路、數據傳速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖,包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後,給了測試結果,對研製工作做了總結,對本設計的優缺點各做了評述。
  4. Buffered inputoutput channel

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