部分和寄存器 的英文怎麼說

中文拼音 [fēncún]
部分和寄存器 英文
partial sum register
  • : Ⅰ名詞1 (部分; 部位) part; section; division; region 2 (部門; 機關或組織單位的名稱) unit; mini...
  • : 分Ⅰ名詞1. (成分) component 2. (職責和權利的限度) what is within one's duty or rights Ⅱ同 「份」Ⅲ動詞[書面語] (料想) judge
  • : 和動詞(在粉狀物中加液體攪拌或揉弄使有黏性) mix (powder) with water, etc. : 和點兒灰泥 prepare some plaster
  • : 動詞1 (存在; 生存) exist; live; survive 2 (儲存; 保存) store; keep 3 (蓄積; 聚集) accumulat...
  • : 名詞1. (器具) implement; utensil; ware 2. (器官) organ 3. (度量; 才能) capacity; talent 4. (姓氏) a surname
  • 部分 : (整體中的局部或個體) part; section; portion
  1. On the base of analyzing the sparc instruction set, this paper researches the pipeline technology and the resolution of correlation problems, and these problems were resolved by using the harvard architecture, internal forwarding and delay branch technology

    本文在析sparc指令系統的基礎上,研究了流水技術及其相關問題的解決方法,並通過在硬體上使用哈佛結構、提前寫的操作時間以及內前推延遲轉移等技術較好的解決了結構相關、數據相關轉移相關的問題。
  2. Every segment register has a “ visible ” part and a “ hidden ” part

    每個段都「可見段」「隱藏段」兩個組成。
  3. Here a delaying - allocation optimizing strategy is proposed, it adopts a coarse - grained adjustment of the stack frame. at the call site allocations, the caller ’ s stack frame is reduced according to the actual usage while the callee only be allocated a limited stack frame, consequently, the potential spill is reduced to the best advantage

    本文提出一種基於延遲配的棧配策略,為了減少額外代價,採用粗粒度的棧幀調整策略,在調用點處使用alloc指令調整調用者的棧幀大小,並為被調用過程棧幀,在調用點處從調用者被調用者兩個角度盡量縮減各自的棧幀,從而減少棧幀的溢出。
  4. The goal of this thesis is to accomplish base - band channel coding / decoding, fh framing / de - framing and fh synchronization, and also to control the modulator and demodulator in the prototype system. all these functions are implemented with a tms320vc5409 dsp

    作為項目的一個重要組成,本文採用dsptms320vc5409實現了基帶處理的通道編解碼、跳頻意義的組拆幀跳頻同步、並對調制解調晶元讀寫進行了配置。
  5. It presents the verification strategy used in the whole eda design flow of the chip. the simulation on module level ( inc. post - layout ) uses the software event - driven simulator, the simulation of the associated modules or whole system uses cycle - based simulator and hardware emulator, for the gate - level netlist produced by using top - down design flow, the sta tool can analyze the static timing, and more formal verification is used to ensure the correct function

    本章還提出了系統在整個eda設計流程中的設計驗證策略方法:模塊級的模擬(包括布線后的模擬)全採用事件驅動式的軟體模擬工具來驗證,各大模塊的聯合模擬及整個晶元的功能驗證(傳輸級與門級)使用基於周期的模擬工具硬體模擬;對于採用top - down的設計方法得到的門級網表使用專門的靜態時序析工具來進行時序析以及採用形式驗證來保證正確的功能。
  6. Chapter five discusses the design and the process of the generation of the control function, including counter, accumulator, comparator, shift register, demultiplexer, collector, access record. chapter six gives some advice and opinions on how to improve this computer software

    其次介紹了計數、累加、比較、多路輸出選擇、移位控制項;數據類中的收集、訪問記錄/輸出記錄等控制項的功能介紹編程思路以及使用實例第六章對平臺的完善改進闡述了一些個人的建議想法。
  7. And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths. boundary scan is designed according to ieee1149. 1, and some other instructions such as degug, runbist are provided to support internal fault testing, online debugging and built - in self - test besides the several necessary insructions. internal scan is implemented by partial scan, through this the boundary of logic component and user - cared system registers can be selected to be scanned

    Bist用於測試cpu的微碼rom ,其它ram則利用微碼rom中的微程序進行測試,而微程序的運行則可以順帶覆蓋其它數據通路,從而使高達70 %的硬體得到測試;邊界掃描按ieee1149 . 1標準設計,除必備的幾條邊界掃描指令外,還提供了debug 、 runbist等指令以支持內故障測試、在線調試及內建自測試;內掃描採用掃描策略,選擇邏輯件的邊界及用戶關心的系統進行掃描,從而實現了硬體邏輯劃,方便了后續的測試碼產生故障模擬,並為在線調試打下了基礎。
  8. This text introduced the work patterns and register structure of 80386 processors in detail at first, latterly expounded especially the hardware interrupt handling of windows 98 with the course to the kernel of windows 98 ; then recommended the framework of realization of highly demanding hardware board interrupt handling by revising idt to intercept interrupt handling at hardware layer, subsequently introduced the application and development of vxd technology to achieve interrupt handling overall all situations under the windows 98 platform ; finally introduced the b / s pattern network application development part of this topic, specifically introduced the jsp technology system, elaborated the communication between network application part and the hardware interrupt handling routine combined with the jni technology, and provided partial important program and corresponding commentary

    本文首先詳細介紹了80386處理的工作模式結構,接著對windows98的內核進行了相關析,重點介紹了windows98的硬體中斷處理過程;隨后介紹了通過修改中斷向量表以實現在硬體層截獲中斷來實現高實時性處理的框架,又介紹了windows98下虛擬設備驅動vxd技術的應用與開發,以及中斷全局處理的實現;最後介紹本課題的b / s模式網路應用開發,具體介紹了jsp技術體系,並結合jni技術闡述了網路應用與硬體中斷處理程序的通信,並給出關鍵程序及其注釋。
  9. Information technology. international standardized profiles fvt2nn. virtual terminal basic class. register of control object type definitions. part 2 : fvt213, fvt214. sequenced and unsequenced terminal control objects. european standard en isp 11185 - 2

    信息技術.國際標準輪廓fvt2nn .虛擬終端基本類型.控制目標類型定義的.第2: fvt213 , fvt214 .連續非連續終端控制目標
  10. Some variations of this instruction format use portions of the target and source register operand specifiers as immediate fields or as extended opcodes

    這一指令格式的一些變種使用目的操作數說明符作為立即欄位或作為擴展的操作碼。
  11. Provides local and global optimizations, automatic - register allocation, and loop optimization

    提供局優化全局優化、自動循環優化。
  12. One was adjusted by built - in register, and the other was adjusted by external variable resistor

    針對vcom調節方式,別設計了由ic內軟體調節可調電阻調節法兩種電路。
  13. Setting up and maintaining your web server can be one of the most complicated and expensive steps in the development process, and the decisions you make now re those you ll have to live down the road. attend our web site management training program and learn from an expert how to sort through the options, evaluate the services offered and form alliances that will serve

    如何動手建立一個網站,選擇一個處,以及以後的網站更新網站服務管理是網站策劃過程中極為重要的一,因為您今天做出的決定會影響到您以後的每一步。網址變動是說說容易做做難,尤其是一旦您的網站成功,變更網址談何容易!
  14. An option provided for most load and store instructions is to update the base register in other words, ra with the data s effective address generated by the instruction

    用指令生成的數據有效地址來更新基址(也就是ra )是大加載儲指令的一個可選項。
  15. To achieve this, an architectural power model for multi - port register - file is presented firstly. based this model, several practical optimization techniques are applied to reduce the power of register - file. the experimental results show that these techniques can reduce about half power of register - files in godson - 2

    並進一步提出通過減少偵聽浮點總線的項數以及減少指令立即數域的保等方法減少發射隊列中相應的開銷,有效降低了面積功耗; 4 .提出了物理堆的低功耗訪問方法。
  16. Some variations of this instruction format use portions of the target and source operand specifiers as immediate fields or as extended opcodes

    這一指令格式的一些變種使用目的操作數說明符作為立即欄位或作為擴展的操作碼。
  17. A storage which works as though it comprised a number of registers arranged in a column, with only the register at the top of the column connected to the rest of the storage

    一種由許多縱向排列的所組成的,只有經頂這個的其餘相連通。
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