陣列模塊 的英文怎麼說

中文拼音 [zhènlièkuāi]
陣列模塊 英文
array module
  • : Ⅰ名詞1 (作戰隊伍的行列或組合方式) battle array [formation]: 布陣 deploy the troops in battle fo...
  • : Ⅰ動1 (排列) arrange; form a line; line up 2 (安排到某類事物之中) list; enter in a list Ⅱ名詞1...
  • : 模名詞1. (模子) mould; pattern; matrix 2. (姓氏) a surname
  • : 名詞(古時佩帶的玉器) penannular jade ring (worn as an ornament in ancient china)
  • 陣列 : [統計學] array陣列處理機 array processor; 陣列印表機 array printer; 陣列雷達 [電學] array radar
  • 模塊 : camac module,camac
  1. The main research advances can be summarized as follows : ( 1 ) study the signal processing ' s performances and methods of homing torpedo system comprehensively, in order to setting up a corresponding mathematical models ; ( 2 ) analyze the ocean channel ' s effects on the work of homing system, then found some models such as target echo signal, noise ( including background noise, target radiating noise, etc ), ocean reverberation. according to them, simulate the array signal ; ( 3 ) the system structure, every function blocks composing are studied and founded thoroughly. then, discuss methods of signal processing in time domain and airspace domain ; ( 4 ) program the simulation software of torpedo ' s homing system according to the simulation models and flow charts, which connected with torpedo ' s control part

    本文所作的主要工作及研究成果主要有以下幾個方面: ( 1 )對自導工作過程中的信號與信息處理的基本理論與方法進行了較為全面的研究,為建立一個較為完備的自導擬系統提供了理論基礎; ( 2 )討論了自導系統工作過程中海洋通道對目標回波信號與目標輻射噪聲信號等的影響,建立回波信號的數學型、環境場中的噪聲信號型(包括海洋環境噪聲、目標輻射噪聲與魚雷背景噪聲等)與海洋混響型,擬產生了聲自導系統基接收到的回波信號與噪聲信號; ( 3 )深入研究並建立了自導擬系統的總體框架,給出各個具體功能組成,討論了聲自導系統對信號的時域與空域處理,並結合擬程序中信號處理,給出固定多通道波束形成的擬實現過程; ( 4 )根據系統的型與已建立的擬流程圖編制了通用魚雷擬器自導系統擬軟體,通過網路與控制系統相連,組成完整的魚雷擬器。
  2. The display with tft is called tft - lcd. in this paper, we design and make a drive system for tft - lcd on the base of liquid crystal module and inverter provided by suzhou auo ( au optronics corp )

    本文利用蘇州友達光電有限公司提供的tft液晶和背光源逆變器,設計並製作了由可編程門( fpga fieldprogrammablegatearray )和單片機控制的顯示系統。
  3. Working on laser diode fiber - coupling modules was summed up, they are, setting up the model of far - field distribution of laser array and the far - field characteristics of difference structures ; designing the temperature - controlled laser diode fiber modules, that has been used as a laser system with temperature - controlled and fiber - output ; realization with high - brightness laser diode fiber - coupling modules ; the fiber ' s application in the field of high power laser

    總結了自己在光纖耦合輸出激光二極體方面所做的一些工作,建立了半導體激光器遠場光束分佈型,並結合具體參數分析了不同結構的激光器的光束遠場分佈特性,可以知道我們設計和優化激光器的結構。設計並製作了光纖耦合的溫度控制系統,並製作成溫控光纖輸出激光器半導體系統投入使用。
  4. With the increasing requirements for detecting distance, photoelectric module, including light source and modulation, can be put under water to reduce the loss of light power in the optical fiber transmission and transmit the detected signal to the signal processing workstation on the shore. optical transceivers must be applied to realize the low - rate optical communication between the workstation on the shore and the long - distance photoelectric modules under water

    隨著光纖水聽器技術的發展,可將光源與調制部分作為遠程光電置於水下,減少光纖傳輸過程中光波信號的損耗,而直接將光纖的探測信號傳回岸基工作站進行處理,以增加光纖水聽器的探測距離。
  5. Effects of random errors on the sidelobe level of a module array antenna

    隨機誤差對天線副瓣的影響
  6. A novel cubic homogeneous similarly lattice module structure was proposed in this paper, which includes active module and passive module according to the different connection mechanism

    本文首先提出並研製了一種新型的正立方體類均一結構,根據中連接機構的不同分為主動和被動兩種。
  7. The whole part of the data acquisition is build in a computer as two data acquisition cards. they are front card and rear card. the front card composed of four modules. they are : coin circuit module, data flow controller module, sdram array module and system bus interface module. the rear card composed of four odules. they are : asynchronous serial port interface module, adc control odule, ecg signal process module and gate control data produce module

    數據採集式實現部分的大部分工作是在前面板上完成的,後面板主要是一些外圍電路。前面板採集卡上從物理上來說主要有四電路:符合電路,數據流控制器電路, sdram和系統總線介面電路組成。後面板採集卡從總體物理上主要有四電路組成: 485串通信電路, adc控制電路,心電數據處理電路和門控信號產生電路。
  8. In the third part, gives a new fft algorithm for realization ofdm modulation in fpga

    第三部分為在的現場可編程邏輯門( fpga )上實現ofdm調制
  9. Finally, flexible programming gate arrays ( fpga ) based circuit frameworks for main components of ofdm synchronization are given

    最後基於現場可編程門( fgpa )實現給出了ofdm同步主要的電路結構。
  10. Based on the different requirements on the operating mode, the back surface cooling package style by impinge cooler and the module package style by micro - channels coolers were studied respectively

    根據對二極體激光器不同工作式要求,分別研究了採用沖擊式冷卻器的背冷式二維封裝和微通道冷卻的化封裝。
  11. The core algorithms in the candidate set creating function module are code pretreatment algorithm and candidate set creating algorithm. candidate list creating function module is the most important module, its core algorithms include candidate list adjusting algorithm, candidate matrix creating algorithm, original word lattice creating algorithm, language element node creating algorithm, optimal candidate words searching algorithm and candidate list creating without code algorithm which

    候選表生成是整個系統最主要的,主要核心演算法包括候選字詞調整演算法、候選矩生成演算法、初步詞網格生成演算法、語言元素結點的生成演算法、尋找最佳語句候選演算法以及無編碼候選生成演算法,無編碼候選生成演算法利用對用戶已輸入的漢字進行切分標注,通過系統中的知識庫信息在沒有輸入編碼的情況下預測后續的輸入。
  12. The fpga of xilinx inc. works as a important part, with which many functional modules, including a controller of lcd display, a fifo ( first in first out ) memory, a controller of sampling clock, and so on, were implemented

    Xilinx公司的fpga (現場可編程門)作為系統的外圍控制器,實現系統的其他很多功能,包括lcd (液晶顯示)控制器、測頻和測周、 fifo (先進現出存儲器) 、采樣時鐘控制器,等等。
  13. Researched the methods to test configrable logic block ( clb ) and its sub - blocks. based on a “ divide and conquer ” methodology, the clb resources are divided into three basic blocks : logic units, carry logic module ( clm ) and lut ’ s ( look up tables ) ram - mode. the testing configurations are implemented based on a two - dimensional array structure for logic blocks

    主要基於「分治法」對clb及其子進位邏輯( clm ) 、查找表( lut )的ram工作式等進行了測試劃分,分別實現了以「一維」為基礎的測試配置和測試向量,以較少了測試編程次數完成了所有clb資源的測試。
  14. Then the vibration equations in the wheel / rail system dynamics are constituted again and the rigidity matrix, the damping matrix and the load matrix can be formed by different computer processor for the sake of increasing parallel computation efficiency

    隨后在公式級對輪軌系統動力學振動方程組的組建進行了優化,將組建剛度矩、阻尼矩和荷載化。
  15. The paper puts forward a combined - allocation - scheme based on the idea of constrained - block - allocation at the storing allocation strategy and gives disk - striping about the storing of big capacity disk array. in the study about the access path of the multi - media data, we introduce several kinds of representative multi - dimensions data index structure including k - d tree, r tree, vp tree and so on. ( 3 ) the research of multi - media database system architecture.

    在存儲分配策略上根據受限分配( constrainedblock ? allocation )的思想,本文提出了聯合分配式( combinedallocationscheme ) ;並針對大容量磁盤的存儲給出了條形分配方案( diskstriping ) ;在多媒體數據的存取路徑的探討中,重點介紹了幾種有代表性的多維數據索引結構,有k - d樹、 r *樹、 vp樹等。
  16. At first, we introduce the working flow of ir image processing and the structure of the image processor, then we present the goal of the design : image pre - processing and data communication. in the part of the image pre - processing, the factors causing the nonuniformity of fpas are analyzed particularly, and several. resolutions are presented, which characters are illustrated at last. according to the design requirement, we decided to implement the two - point nonuniformity correction method in fpga

    在圖像預處理部分,首先就紅外成像傳感器非均勻性的成因進行了詳細分析,總結了紅外成像傳感器非均勻性校正的主要方法,分析了各種方法的優缺點;根據成像制導信息處理機實時處理的要求,利用現場可編程門實現了基於浮點運算的兩點法非均勻性校正
  17. 10 wallner s. a configurable system - on - chip architecture for embedded devices. in ninth asia - pacific computer systems architecture conference acsac 2004, beijing, china, springer, lncs 3189, sept. 7 - 9, 2004, pp. 58 - 71. 11 wallner s. design methodology of a configurable system - on - chip architecture

    它結合了大量的宏資源,包括一個類標量處理器內核粗粒度可配置的處理嵌入式的存儲器,以及由微任務控制器mtc監控的定製
  18. In view of numerous digital and analog signals need to be processed, and the difficulty of real - time processing of multi channel 400 hz ac signal, vhdl ( vhsic hardware description language ) is applied to design the digital circuit, which is successfully realized in field programmable gates array ic - xc2s100

    針對i o中需要處理的數字量和擬量較多的事實,以及多路400hz信號的實時處理較為繁重的現狀,作者採用了現場可編程門( fpga )加以解決。
  19. Such aspects also get involved in as the interfaces of vk42 dot matrix lcd module with scm ' s bus port and serial port as well as their programming realization

    闡述了vk42圖形點液晶與微機和單片機的總線口、串口的介面設計方法和編程實例。
  20. States collection and rules collection together enable efficient access control. among options of different content filtering methods, the state machine - based plan is selected, which is more appropriate for hardware design. and based on this, the concept of unit filter module - servo is presented, and the implementation of the servos " array enables parallel filtering and enhanced the performance of content filter module

    此外,還進一步引入了cache的設計思想,提出了狀態表結構,狀態表和規則表的有機配合,實現了高效的訪問控制功能;在內容過濾的眾多選擇中,針對硬體設計的特點,確立了基於狀態機的實現方案,並提出了單元過濾?伺服器的概念,通過伺服器技術的引入,使得過濾可以並發執行,提高了內容過濾的處理能力。
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