集成晶體管 的英文怎麼說
中文拼音 [jíchéngjīngtǐguǎn]
集成晶體管
英文
integrated transistor- 集 : gatherassemblecollect
- 成 : Ⅰ動詞1 (完成; 成功) accomplish; succeed 2 (成為; 變為) become; turn into 3 (成全) help comp...
- 晶 : Ⅰ形容詞(光亮) brilliant; glittering Ⅱ名詞1. (水晶) quartz; (rock) crystal 2. (晶體) any crystalline substance
- 體 : 體構詞成分。
- 管 : Ⅰ名詞1 (管子) pipe; tube 2 (吹奏的樂器) wind musical instrument 3 (形狀似管的電器件) valve;...
- 集成 : integration集成晶體管 integrated transistor; 集成元件 integrated component
- 晶體 : [晶體學] crystal; vitrella; crystal body; crystalloid; x-tal
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In the 1960s the ic market was broadly on bipolar transistors.
六十年代集成電路市場主要為雙極型晶體管。Two other effects are transient phenomenon called single event upset ( seu ) and single event latchup ( sel ). in this paper, some means to harden the devices against these phenomena are used. guard banding around nmos and pmos transistors greatly reduces the susceptibility of cmos circuits to lachup
在本文設計中,採用雙環保護結構,大大的降低了cmos集成電路對單粒子閂鎖效應的敏感性;對nmos管採用環型柵結構代替傳統的雙邊器件結構,消除了輻射感生邊緣寄生晶體管漏電效應;採用附加晶體管的冗餘鎖存結構,減輕了單粒子翻轉效應的影響。The modern successor to the transistor is the integrated circuit.
晶體管的現代后繼者是集成電路。The very first power1 was actually several chips on a single motherboard ; this was soon refined down to one rsc risc single chip with more than a million transistors
最初的power1晶元實際上是在一個主板上的幾個晶元;后來很快就變成一個rsc ( risc單一晶元) ,其中集成了100多萬個晶體管。Modern voltage references are constructed using the energy - band - gap voltage of integrated transistors, buried zener diodes, and junction field - effect transistors
現代電壓基準建立於使用集成晶體管和帶狀能隙基準、掩埋齊納二極體和結場效應晶體管。If none of the passive - component tests fail, the tester will then test active components, such as transistors and ics
如果所有的無源器件都通過測試,然後對有源器件測試,如晶體管和集成電路。Along with silicon ulsi technology has seen an exponential improvement in virtually any figure of merit, as described by moore ’ s law ; the miniaturization of circuit elements down to the nanometer scale has resulted in structures which exhibt novel physical effects due to the emerging quantum mechanical nature of the electrons, the new devices take advantage of quantum mechanical phenomena that emerge on the nanometer scale, including the discreteness of electrons. laws of quantum mechanics and the limitations of fabrication may soon prevent further reduction in the size of today ’ s conventional field effect transistors ( fet ’ s )
隨著超大規模集成電路的的發展,半導體硅技術非常好地遵循moore定理發展,電子器件的特徵尺寸越來越小;數字集成電路的晶元的集成度越來越高,電子器件由微米級進入納米級,量子效應對器件工作的影響變的越來越重要,尺寸小於10nm將出現一些如庫侖阻塞等新特性。量子效應將抑制傳統晶體管fet繼續按照以前的規律繼續減小。在這種情況下,宏觀的器件理論將被替代,可能需要採用新概念的晶體管結構。Xing su ( microelectronics and solid state electronics ) directed by prof. lin chenlu the fast development of information technology requires integrated circuit to be greater integrated, faster functioned, and lower power - consumed, that lead to continuous shrinkage of mos and dram feature size. and under this trend the thickness of mos gate dielectrics ( sio2 ) would soon scale down to its physical limit
日益增長的信息技術對更高集成度、高速、低功耗集成電路的需求,驅使晶體管的尺寸越來越小,隨之而來的問題是作為mos柵氧化物和dram電容介質的sio _ 2迅速減薄,直逼其物理極限。After introduction of the tranlinear loop principal, the bjt current controlled conveyor has been designed by using mixed tranlinear loop voltage follower. as for modern integrated circuit, the model of mos transistor, the active resistance and the current mirror integrated circuit formed by mos transistor are introduced. the cmos current controlled conveyor has been derived from mixed tranlinear loop cmos voltage follower based on weak inversion operation
針對現代集成電路的工藝,本文對mos晶體管的工作原理進行了簡要的敘述,討論了有源電阻和電流鏡的實現方法,並利用mos晶體管的亞閾值特性組成混合跨導線性迴路完成對應的電壓跟隨器的設計,推導出了基於cmos技術的電流控制傳送器。The paper are investigating several alternatives for example quantum dot cellular automata and single electron transistor to substitute conventional field effect transistors ( fet ’ s ) for ultra large scale integrated circuit ; and i take research on the modeling of single electron transistor and single electron cicuit
基於以上考慮,本文研究一些新的基於量子力學原理的器件如量子點細胞自動機( qca ) 、單電子晶體管( set )取代以fet器件為基礎超大規模集成電路,主要在單電子晶體管建模和單電子電路綜合做了一些研究工作。Discrete semiconductor devices and integrated circuits - field - effect transistors - additional ratings and characteristics and amds in the measuring methods for power switching field effect transistors
分立半導體器件和集成電路.場效應晶體管.電源轉換場效應晶體管測量方法中附加功率特性和amdsOne ic replaces many transistors in a computer ; result in a continuation of the trends begun in the second generation
一個集成電路代替了計算機中的許多晶體管,導致了始於第二代的一些趨勢的繼續。First, the paper researchs the spice simulation of single electron transistor based on curve approach and quasi - analytical model of single electron transisor, and simulate characteristic of single electon transistor with matlab tool. secondly, the paper combine spice simulation program with master equation of single electron transistor, put forward novel spice simulation method of single electron transistor based on master equation, by choose master state of single electron transistor and build master equation of single electron transistor, afterward gain nonlinear cortrolled source of spice model of single electron transistor by solve the master equation of single electron transistor and simulate v - i characteristic of single electon transistor by spice program, it ’ s result prove the method is availability precision comparing with master equation method
然後在此基礎上提出了基於主方程法單電子晶體管spice模擬新方法,本論文結合當前電路模擬軟體spice程序和單電子晶體管主方程模擬演算法,通過選擇單電子島電子數的主要狀態,建立單電子晶體管主方程,然後求解主方程,求得單電子晶體管spice等效模型的受控源的非線性函數,然後利用集成電路輔助分析軟體spice的abm (模擬行為建模)建立單電子晶體管( set ) spice等效模型,利用set的等效模型對單電子晶體管v - i特性進行模擬,實驗證明此方法與直接解主方程法相比具有一定的精度。Techniques were developed to hook many transistors into chips
將許多晶體管聯結到集成塊上的技術已發展成了。Especially, mesfet devices fabricated on lec si - gaas substrate have been adopted into very large - scale integration ( vlsi ) and monolithic microwave integrated circuit ( mmic ) extensively. therefore, it is necessary to study the influence of defects in substrate material of lec si - gaas on performance of mesfet to meet the need of design and fabrication of gaas ic
以液封直拉半絕緣gaas為襯底的金屬半導體場效應晶體管( mesfet )器件是超大規模集成電路和單片微波集成電路廣泛採用的器件結構,因此研究lec法生長si - gaas ( lecsi - gaas )襯底材料特性對mesfet器件性能的影響,對gaas集成電路和相關器件的設計及製造是非常必要的。The team hopes to link nanofluidic transistors together into an integrated circuit within the year as the next step to harnessing massive numbers of transistors in parallel
這個研究團隊的下個目標,是在今年內將奈米流體晶體管連結成集成電路,以便同時控制多個晶體管。Poly - crystallization silicon thin film transistor ( p - si tft ) addressing liquid crystal display has been currently the research and development focus in the field of flat panel displays, as it is most feasible approach to high resolution, high integration and low power consumption as a result of its high aperture ration. there are less number interface of the crystal grain, lower metal impurity and higher mobility in the electric current director, the milc p - si tft has been the research focus in the fields of amlcd, projection display, oled etc. there are vast dangling bonds and bug
多晶硅薄膜晶體管( p - sitft )液晶顯示器可以實現高解析度、高集成度、同時有效降低顯示器的功耗,因而成為目前平板顯示領域主要研究方向;而以橫向晶化多晶硅為有源層的tft由於在導電方向有更少的晶界、更低的金屬雜質污染、更高的載流子遷移率而成為目前有源矩陣液晶顯示領域、投影顯示、 oled顯示等領域研究的熱點。In modern vlsi technology, hundreds of thousands of arithmetic units fit on a 1cm 2 chip. the challenge is supplying them with instructions and data. stream architecture is able to solve the problem well
在摩爾定律作用下,在單晶元上可集成的晶體管數快速增長,單晶元擁有成百上千的運算單元不再是問題,關鍵是如何給如此多的alu提供足夠的指令和數據。Discrete semiconductor devices and integrated circuits - bipolar transistors
分立半導體器件和集成電路.雙極晶體管A silicon self - aligned technology was achieved by using a smart power integrated technology to get high power of the circuit. vertical pnp transistor whose base is epitaxy layer was used as output. the collector of the vertical pnp transistor was set on the back of the chip with low resistance p + substrate as ohm contact
在工藝中,採用了smart功率集成技術實現電路的大功率,基區是外延層的縱向pnp晶體管作為輸出,將集電極置於晶元背面,採用低電阻率p ~ +襯底作為歐姆接觸。分享友人