電路層 的英文怎麼說

中文拼音 [diànlùcéng]
電路層 英文
circuit layer
  • 電 : Ⅰ名詞1 （有電荷存在和電荷變化的現象） electricity 2 （電報） telegram; cable Ⅱ動詞1 （觸電） give...
  • 路 : 1 （道路） road; way; path 2 （路程） journey; distance 3 （途徑; 門路） way; means 4 （條理） se...
  • 層 : i 量詞1 （用於重疊、積累的東西 如樓層、階層、地層） storey; tier; stratum 2 （用於可以分項分步的...
  • 電路 : [訊] circuit （ckt）; electric circuit; electrocircuit電路板 circuit board; 電路保持 guard of a c...
  1. Hardware engineers started working at higher levels of abstraction and using simulators and other forms of automation to do all the stuff they used to do on breadboards

    硬體工程師從抽象的更高層次開始工作，並使用模擬器和其他自動化的形式在電路測試板上進行原料填充。
  2. A thin epitaxial layer ( 10gm ) ldmos device used n - burry layer structure was proposed in the paper during the high - voltage device design, which is helpful to improve the drive circu it ? technology

    在高壓器件研究中，提出了一種外延層厚度為10 m採用n埋層結構薄外延高壓ldmos器件，對進一步改進驅動電路的工藝有著積極的意義。
  3. For vlsi, a plane surface may be approximated by depositing the interlevel dielectric by bias-sputter deposition (see section 9. 2. 4) or by using planarization.

    對于超大規模集成電路的平面狀表面，可以用偏置濺射淀積法的層間介質淀積（見924節）或用平面化工藝來近似獲得。
  4. Experimental results show that the bistable of tuned substrate self - bias was determined by discharge gas pressure, discharge power and tuning circuit parameters etc. the bistable exists is because of there is capacitive coupling in icp system and sheath capacitance is nonlinear

    實驗結果表明這種跳變回滯現象與等離子體的放電氣壓、射頻功率以及調諧外電路的參數等多種因素密切相聯系。而產生跳變回滯現象的原因是icp中存在容性耦合以及鞘層電容具有非線性特性。
  5. Secondly, it describes the hardware system of the exoskeleton hand, including the circuit design of the driver, the fpga - based motion controller, the processing and the a / d conversion for the sensor signal

    其次，設計了外骨骼手底層控制系統的硬體電路，包括微型驅動器模塊電路的設計，基於fpga的運動控制器電路的設計，傳感器信號調理以及模/數轉換電路的設計。
  6. Ym series is an epoxy - bond, two - part liquid thermal cure marking ink. it has such perfimance characters as good printing adaptability, fast curing rate excellent adhesion and insulation resistance. it is better to be used in making double surface and the multipke layers circuit boards

    Ym為雙組液型熱固化標記油墨，具有良好的印刷性，固化速度快，塗膜硬化后具有優異的附著力、耐化學性，特別適合用於雙面及多層印刷電路板。
  7. The final ic is made by sequentially transferring the features from each mask, level by level, to the surface of the silicon wafer.

    按照順序從每一塊掩膜版上將圖形一層一層地轉移到矽片的表面，就制得了成品集成電路。
  8. In early ic fabrication practice, etch bias was usually dealt with by introducing an appropriate amount of compensation in the masking layer.

    在早期的集成電路製作實踐中，刻蝕偏差通常是通過在掩膜層上引入一個適量的修正來處理的。
  9. Incondition of surface anti - corrision and insulation coat of metal and tiny hole of steel where resistance and crack is very small, when supplying a high voltage, gas crack will be punctured and electric spark discharging will occur, now send a pulse signal to the alarming circuit the alarmer can send out sound and light to alarm. we can do leak hunting on the coating according to this principle

    金屬表面絕緣防腐層過薄、漏鐵及漏電微孔處的電阻值和氣隙密度都很小，當有高壓經過時就形成氣隙擊穿而產生火花放電，給報警電路產生一個脈沖信號，報警器發出聲光報警，根據這一原理達到防腐層檢漏目的。
  10. Based on the mesne layer theory, the centralized stress cantilever was designed, and the infection factors was analysed in detail. in the designing of controditional circuits, comparing with several troditional methods and the merits was integrated, a novel circuits with fewer components and higher performance was designed, and by using the micro assembly techniques, the circuits was minisized

    文中以材料力學的中性層理論為理論依據，設計了結構獨特的應力集中結構懸臂梁，並對各影響因素進行了詳細分析。在調理電路的設計中，通過對幾種傳統方案的比較，綜合了它們的優點，設計了一種元件少、性能佳的新型電路，並採用微組裝技術，實現調理電路微型化。
  11. At the same time the effection of some important recombinations are discussed and the relation of photoconduction versus time is given. in chapter 4, auston circuit, blumlein pulse forming line, multiplier of pulse forming line are introduced and give their differentiates

    在第四章中，分析各種以光導開關為核心器件的電脈沖成形電路: auston電路、 blumlein脈沖成形線、層疊線倍壓器，對其輸出轉換效率進行比較，並進行實驗研究。
  12. The chip simulation network laboratory system this paper disguessed is a distribute network simulation system based on lan. the system ' s architecture is a c / s of three lays. the front platform are the chip simulation network system application program terminer ; the middle lay is a dcom server, it ' s duty is to deal with the communication and data transmission between the terminer and then database server, and to execute the logical operation. the application program just connect with the middle lay and get data from it, the connection and operation with database server will be managed by the dcom server. the duty of database server is to access and backup the final data

    具體是由位於網路各個終端的晶元模擬網路實驗系統應用程序為前臺；中間層為dcom應用程序服務器，負責處理前臺應用程序與后臺數據庫的通信和數據傳輸，並執行業務邏輯，前臺應用程序只需要與應用程序服務器建立連接，在中間層操作數據即可，與后臺數據庫的連接和操作由應用程序服務器來統一管理操作。后臺數據庫只負責數據的存取操作。本論文實施的晶元模擬網路實驗系統模擬了主要的邏輯電路器件， 8088cpu ，存儲器，寄存器，數據總線，地址總線和控制總線，及其它相關晶元。
  13. Specifications. specification no. 19. thin bismaleimide triazine modified epoxide woven glass fabric copper - clad laminated sheet of defined flammability for use in the fabrication of multilayer printed boards

    規范.第19號規范:多層印製電路板構件規定的可燃性雙馬來酰亞胺三嗪改型氧化物玻璃纖維編織包銅疊層板材
  14. Base materials for printed circuits - thin bismaleimide triazine modified epoxide woven glass fabric copper - clad laminated sheet of defined flammability for use in the fabrication of multilayer printed boards

    印製電路用基體材料.用於多層印製板構成的限定可燃性的薄雙馬來酰亞胺三嗪改性的環氧織物玻璃纖維包銅層壓板
  15. Base materials for printed circuits. part 2 : specifications. specification number 18 : bismaleimide triazine modified epoxide woven glass fabric copper - clad laminated sheet of defined flammability vertical burning test

    印刷電路用基材.第2部分:規范. 18號規范:規定易燃性的雙馬來酰亞胺三嗪改良型環氧化合物機織玻璃纖維織物包銅層壓板
  16. Base materials for printed circuits. part 2 : specifications - specification number 18 : bismaleimide triazine modified epoxide woven glass fabric copper - clad laminated sheet of defined flammability vertical burning test

    印刷電路用基材.第2部分:規范. 18號規范.規定易燃性的雙馬來酰亞胺三嗪改良型環氧化合物機織玻璃纖維織物包銅層壓板
  17. . 1 base materials for printed circuits ; part 2 : specifications ; specification 18 : bismaleimide triazine modified epoxide woven glass fabric copper - clad laminated sheet of defined flammability vertical burning test ; amendment 1

    印製電路用基材.第2部分:規范.第18號規范:規定易燃性的雙對馬來酰壓胺三氮雜苯改良型環氧玻璃纖維編織覆銅層壓板
  18. Circuit layer network

    電路層網路
  19. Circuit level gateway

    電路層網關器
  20. Then studis on new models and new approaches based on boolean process in delay automation are made. analytical delay model is improved with the new concept of sensitization, based on which delay matrix is proposed to describe the delay of circuit modules. then introducing hierarchical delay analysis methods into delay matrix analysis, a novel exact hierarchical delay ananlysis method is presented

    在組合邏輯電路精確定時方面，本文用波形多項式偏導定義的敏化概念改進了解析延時模型，在此基礎上建立了基於敏化的延時矩陣以描述電路模塊的延時，隨后將層次化延時分析方法引入基於延時矩陣的延時分析中，形成一種新的精確的通用電路層次化延時分析方法。
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