circuit logic 中文意思是什麼

circuit logic 解釋
電路邏輯
  • circuit : n 1 (某一范圍的)周邊一圈;巡迴,周遊;巡迴路線[區域];迂路。2 巡迴審判(區);巡迴律師會。3 【...
  • logic : n. 1. 邏輯,理論學。2. 推理[方法];邏輯性,條理性。3. 威力,壓力,強制(力)。
  1. This paper mainly aims at the characteristics of the hardware and software structure of the parallel computer on satellite, and has fulfilled researches of fault tolerant technique in three aspects of control theories and engineering : the first research of the system level fault - tolerant module is based on the system structure of the parallel computer on satellite, a kind of cold backup module and a kind of hot backup module for multiprocessor computer have been put forward. then the research of software fault tolerant technique which is based on the operate system named rtems has been carried, the mission level fault - tolerate arithmetic and the system level fault - tolerate mechanism and strategies based on the check point technique have been put forward, at the same time the self - repair technique of software which has used the technique of system re - inject has been studied. finally the technique of components level fault - tolerant based on fpga has been studied, a kind of two level fault - tolerant project which aims at the fault - tolerant module of the parallel computer on satellite has been put forward, and the augmentative of circuit that project design realization need is little, this project can avoid any breakdown of any part logic circuit of the fpga

    本課題主要針對星載并行計算機體系結構及軟體結構的特點,從如下三個方面進行了容錯控制理論研究和實踐工作:首先進行了基於星載多cpu并行計算機體系結構的系統級容錯模型研究,提出了一種多cpu冷備份容錯模型和一種多cpu熱備份容錯模型;然後進行了基於rtems操作系統的軟體容錯技術研究,提出了任務級容錯調度演算法以及基於檢查點技術的系統級容錯恢復機制和策略,同時研究了利用系統重注入進行軟體在線自修復的容錯技術;最後研究了基於fpga的部件級容錯技術,提出了對容錯模塊這一星載并行計算機關鍵部件的兩級容錯方案,實現該方案所需增加的電路少,可避免板級晶元以及fpga晶元內部任何邏輯發生單點故障。
  2. Complementary constant current logic circuit

    互補恆流邏輯電路
  3. This paper presents the logic circuit design of ccu for lx - 1164 cpu chip, for ccu, data and instructions are stored in separate data and instruction caches

    本人有幸在夏宏博士的指導下參加這一工程,承擔lx ? 1164cpu的高速緩存控制器( ccu )的邏輯設計和功能模擬。
  4. In the hardware design, the paper completes modules ’ design like outside memory, patulous a / d, patulous d / a, rs232 communication, ecan communication, led control, keyboard control, distant control, emulation, reset, logic voltage switch, dsp supply power regulate and ac - dc power circuit, as well as room layout design like anterior panel, back panel etc. and dsp transfers data with peripheral equipments except outside memory using serial ports. besides, the whole circuit is configured in interrupt response. thus, it can meet system demand as well as take full advantage of tms320f2812 ’ s hardware resource. in the software design, the paper finishs programs like the interface programms intercommunicates with people, the distant control program, ad and da modules ’ control program, in addition, the paper select the velocity and acceleration state - feedback algorithm and is written in the program. the software design uses dsp integrate exploiting environment named ccs2. 2 of ti inc. as software instrument, and programs with the combination of c language and assembly language. moreover, in order to maintenance or modify the software expediently and shorten software ’ s exploitation time, the design adopt software modularization technique. finally, some air cylinder experiments are carried out to proved that the pneumatic controller is very practical

    在硬體設計中,本文完成了片外存儲器擴展、 a / d擴展、 d / a擴展、 rs232通信介面、 ecan通信總線介面、液晶顯示控制、鍵盤控制、遠程控制、模擬、復位、邏輯電平轉換、 dsp工作電源校正電路和ac - dc電源等模塊設計以及控制器前面板、後面板等的空間布局設計。其中dsp與除外部存儲器的外圍設備之間的數據傳送全部採用串口通信,同時系統電路配置成中斷響應方式,這樣既滿足了系統要求,又充分利用了tms320f2812的硬體資源。在軟體設計中,本文完成了人機界面功能模塊、遠程控制模塊、 ad擴展模塊、 da擴展模塊、速度和加速度狀態反饋的控制演算法的程序設計。
  5. Through the simulation of large - scale circuit simulation proved that use the crossover tearing technology could detailed network structure, simplify the diagnostic process, and the neural network can parallel deal with the diagnosis information, and the logic operation can judge the information of the multi - fault. the illustrative simulation shows that it can increase the diagnosis speed and decrease the workload before test

    通過對大規模模擬電路的模擬證明,使用交叉撕裂明細網路結構,簡化診斷過程,且運用神經網路組對信息進行并行處理,邏輯分析運算對多故障信息進行處理判斷,大大提高了故障診斷速度,減小了測前工作量。
  6. The logic design of sequence circuit of welding supply based on gal

    的焊接電源時序電路設計
  7. By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure. as followed, this paper depicted design details of intelligent instrument " s hardware, it included the design of interface circuit, data commutations and digital logic of dsp, mcu, internet ' s chip and isp ' s apparatus etc., and have designed schematic map and circuit. so it accomplished the full design of hardware / software of the new type intelligent instrument

    本文具體給出了新型智能儀器硬體結構及實現,描述了智能儀器硬體設計細節,包括數字信號處理器、單片機、 internet接入晶元、可編程數字/模擬器件等在新型智能儀器中的介面電路設計、數據通信設計和數字邏輯設計等,詳細地給出了設計原理圖和電路圖;給出了新型智能儀器的軟體設計細節,從而完成了新型智能儀器完整的軟硬體設計。
  8. A monolithic integrated logic circuit of resonant tunneling diodes and a hemt

    的單片集成邏輯電路
  9. However, since memory circuit is very large and dense and the growing of its size is amazing, it is unpractical to extract the logic parameter directly with simulation tools

    然而,由於存儲器單元密集和電路龐大的特點,並且存儲器的增大極為迅速,使得用模擬工具直接提取邏輯參數並不現實,存儲器的簡化迫在眉睫。
  10. Superior frequency characteristics shortest recovery time, realize the switching of the circuit, complete functions such as open and close, clip wave, wave detector, high - frequency rectifier, logic control, which fit for all kinds of digital circuits and analog circuits

    具有良好的高頻開關特性反向恢復時間短,可實現對電路開和關的控制功能,可完成開關限幅檢波高頻整流邏輯控制等功能,適用於各類數位電路類比電路。
  11. After the selection is made, the designer modifies his system digital circuit requirements to match the characteristics of the selected logic family.

    選擇好類型之後,設計人應該修改對系統數字電路的要求,以適應所選之邏輯電路參數。
  12. Secondly, the composition and function of expander board is introduced, the paper describes a detail developing process of selecting component, design interface circuit, protract pcb with protel and design pci interface logic and user ' s logic. with ahdl and max + plus. in addition this paper discusses how to debug pci board, and give the simulation waveform and the result of debug. on the base of all functions is ture, this paper introduce the config registers and memory of bu - 61580, realize the interrupt function and communication based on mil - std - 1553b

    首先分析了擴展板的組成、功能,對pci介面邏輯和擴展板的內部邏輯進行詳細設計,並根據其資源要求進行器件選擇,然後使用protel工具進行電路板的製作。另外,本文還介紹了擴展板的調試方法,給出了邏輯模擬波形和調試結果。在此基礎上,本文闡述了協議晶元的配置方法,實現了1553b通訊擴展板間的通訊及中斷功能,達到了開發技術指標。
  13. Abstract : it is an efficient method that realizing the contro l circuit of a power source system with fplds ( field programmable logic devices )

    文摘:使用現場可編程邏輯器件實現各種電源控制電路是一種非常有效的設計方法。
  14. Complete the bi - directional data communication between the hardware and the microcomputer. ( 3 ) design the cpld ( complex programable logic device ) processing circuit to preprocess the initial signal in the data acquisition module

    ( 3 )下位機採集模塊部分,在一塊cpld ( complexprogramablelogicdevice )集成晶元上燒寫了設計的電路,能夠對輸入原始信號進行預處理。
  15. Above all, [ 12 : 8 ] harming error correction theory is mentioned in this paper. the edac circuit designed by vhdl can works normally at different frequency of the cpu clock such as 66mhz 50mhz 40mhz 33mhz. the edac function of the circuit can also be disabled by software tool. meanwhile, some basic devices such as and logic, or logic, not logic and some small scale integrated circuits are also integrated in the fpga

    本論文闡述了12 , 8漢明碼糾錯設計過程,採用vhdl語言實現糾錯編碼器( edac ) ,本設計能夠適應cpu時鐘信號clk2的不同頻率,如66mhz 、 50mhz 、 40mhz 、 33mhz ,並且能夠通過軟體的控制使fpga的糾錯編碼功能關閉。
  16. Design of a flip - flop circuit within digital logic analyzer based on fpga

    的邏輯分析儀觸發電路的設計
  17. The hardware in this system includes a digital signal processor, an analogy input channel, a lcd, an analogy output path, a keyboard input part, a guard circuit and a logic control circuit

    該系統硬體包括數字信號處理器晶元、前向輸入通道、液晶顯示器、模擬量輸出部分、鍵盤輸入部分、保護電路部分和邏輯控制部分。
  18. Low power vlsi designs can be achieved at various design levels, which rang from circuit, logic, architecture and algorithmic ( behavioral ) levels to system level, according to the down - top design flow

    超大規模集成電路低功耗設計可以在不同的設計層次進行考慮,自下而上分可以分為:物理層、邏輯層、結構層、演算法(行為)層和系統層。
  19. Both problems can be solved by using short circuit logic

    這兩個問題都可以使用簡短邏輯進行解決。
  20. Using short circuit logic

    使用簡短的邏輯
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