compiler design 中文意思是什麼
compiler design
解釋
編譯程序設計-
The design of this chip sticks to the general methodology of hdl design. lt is entered in hdl format with innoveda ' s visual hdl and simulated with modelsim simulator, after synthesized with fpga compiler ii, the edif is entered in quartus ii, which is supplied by altera corporation to place and route. the sdo file produced by quartus ii is backannotated to the netlists and timing - simulation is been done. the success of this cryptogrammic chip also shows the effectiveness and advantage of the methodology of high level design with hdl
在innoveda的visualhdl設計平臺上用hdl語言完成了設計輸入，使用modelsim模擬器完成了功能模擬，使用synopsys的fpgacompiler進行了基於alterafpga庫的網表綜合，最後將edif網表輸入altera的布局布線工具quartus中進行了布局布線，將生成的sdo文件反標到modelsim模擬器中進行了時序模擬，該設計的成功，再一次表明了hdl設計方法的正確性和有效性。 -
After that, it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler. moreover, this paper explores the method of design the floating - point arithmetic unit. referring to the ieee754 - 1985 standard for binary floating - point arithmetic, the algorithm and the behavior description of floating - point adder and multiplier is given, and the simulation and verification is shown at the end of this paper
此外，本文還對處理器的浮點運算單元設計做了初步的研究，以ansi ieee - 754浮點數二進制標準為參考，借鑒了經典的定點加法器和乘法器的設計，嘗試性的給出了浮點加法單元和乘法單元的實現模型和行為級上的硬體描述，並對其進行模擬和驗證。 -
Design of a symbol table in occl compiler
編譯器中符號表的研究及設計 -
Richard has 10 years of development experience with compiler language design
Richard有10年的編譯器/語言設計的開發經驗。 -
In this course, we study low - power computer design techniques involving mos circuits, logics, computer organization, function units, pipeline, bus protocols, memory subsystems, compiler, os, and virtual machines
本課程中，我們將研讀計算機低功耗設計技術，內容涵蓋mos電路，邏輯，計算機組織，功能單元，管線處理，匯流排規約，記憶體子系統，編譯器，作業系統，及虛擬機等的相關設計。 -
We use different commercial eda tools in order to achieve better implementation in different design phase, which include silicon ensemble of cadence, design compiler and design primer of synopsys and so on
在設計的不同階段使用了不同的主流eda工具進行輔助設計和驗證，包括synopsys公司的邏輯綜合工具designcompiler 、靜態時序分析工具designprimer和cadence公司的自動布局布線工具siliconensemble等。 -
Design of cai teaching software of compiler principle based on www
的編譯原理課件設計 -
The most advance software - engineering methodology was presented, for example the oop, com, compiler technology and so on., which are used to design and develop the component modeling and simulation application framework of the tgcs
本論文模擬軟體的實現採用了最先進的軟體工程方法? ?面向對象技術、組件技術、編譯技術，由此設計和開發了的魚雷制導系統模擬環境。 -
At last, we compile the design with synopsys design compiler in 0. 25wn cmos technology. the synthesis information about area, power and time shows that this method has the advantage of fitting special architecture into algorithms easily
最後用0 . 25 mcmos工藝在eda工具上實現，綜合結果表明：基於ip核的軟硬體協同設計方法，具有具體結構對演算法的適應性好、設計周期短、系統易於優化等特點。 -
Then, a new design automation methodology is put forward which uses uml for specification, systmec for simulation and synopsys tools ( cocentric systemc compiler ) for hardware synthesis. the main feature of this methodology is its high possibility of implementation
提出了一個基於uml系統描述的， systemc模擬驗證的，利用cocentricsystemccomplier進行硬體綜合的自動化設計方案，這個方案最大特點是可實現性強。 -
Except for design methodology and technique, some comprehensive experiments are performed. these experiments use some eda tools, including functional simulation with cadence ' s verilog xl, logic synthesis with synopsys ' s design compiler
本文除了介紹的設計方法和設計技巧，還做了一些有益的實驗，使用到許多流行的eda工具，如cadence公司的verilog - xl 、 siliconensemble ， synopsys公司的designcompiler 、 physicalcompiler等。 -
Firstly the thesis introduces the frame and design of the c 、 c + + compiler, and discusses the implementation of the compiler based on gcc, which is a retargetable compiler. the implementation considers the architecture of thump, including the delay slots, the instruction interlock, macro expansion, and libraries for soft - float. and addresses the process developing the cross compiler and native compiler for thump
論文介紹了thump的c 、 c + +編譯器的總體結構以及設計方案，並詳細闡述了利用可重定向編譯器gcc實現thump的c 、 c + +編譯器的方法和過程，包括延遲槽修改、指令互鎖的實現、宏指令展開以及軟體浮點庫的生成等，並實現了thump的交叉編譯器和本地編譯器。 -
Secondly, the paper introduces the language of psdl and summarizes genenal programming model of corba application through pss, at the same time the paper puts forward a design and implementation of psdl compiler, that is seijpsdl
然後介紹了psdl語言的特點，並且總結了基於pss的corba應用的編程模式，提出了一個psdl編譯器的設計與實現方案sei _ psdl 。 -
From chapter 3 to chapter 7, the autor introduce in detail the design idea of this platform software ( include core data structure, user interface ( ui ), editor, compiler, etc )
在第三章至第七章則介紹平臺軟體的詳細設計（包括核心數據結構、用戶界面、編輯器和編譯器等） 。 -
Base on above reason, this paper design and realize a c code rule compiler rulec engine. it can inspect the c code as the traditional compiler, besides that, it also include below functions : when this tool discovers the grammar error, it doesn ’ t stop the inspection and go on to inspect the left code ; the rules used in the inspection can increase, delete or amend according to user ’ s request. this tool can be runned on the windows, linux, solaris and other system platforms ; through counting the software complexity of c code, this tool can provide the important target of evaluated c code quality
因此，本文設計了一個c代碼規則編譯器rulecengine ，它除了實現與傳統編譯器一樣能夠檢查c代碼的功能，還實現了如下的功能:發現c代碼語法錯以後不停止檢查，仍然繼續對代碼進行規則檢查;檢查c代碼所需的規則可以根據用戶的需求隨意增加，刪除或修改;能夠在windows ， solaris等系統平臺上使用;通過統計c代碼的軟體復雜度，提供了衡量c代碼質量的重要指標。 -
This notation is frequently used in computer science, especially in compiler design
這種表示法經常用於計算機科學，特別是編譯器設計方面。 -
He has also been a research scientist with the national university of singapore, conducting research in the areas of parallel computing and compiler design
他還曾經是新加坡國立大學的一名研究科學家。他的研究興趣包括普適計算、編譯器/計算機語言的設計、并行處理以及計算機體系架構。 -
This paper does a research into the measures of dsp ' s c - compiler design. after comparing the dsp with risc processor in the respects of structure and application, and referring to the classic theory of compile for the general - purpose processors, some feasible schemes for dsp ' s c - compiler design are given along with some optimization strategies suitable to the dsp ' s feature
本文對dsp晶元的c編譯器設計進行了探討性的研究，通過對dsp和通用處理器的在結構和應用等方面的對比給出一些可行的c編譯設計的實現方法並借鑒傳統的編譯優化理論結合dsp結構和應用特性得出一些與dsp相適應的編譯優化策略。 -
You can apply the overall concept in these design patterns to any machine architecture, operating system, and compiler combination
您可以在任何機器體系架構、操作系統和編譯器上應用這兩種設計模式中的概念。 -
The proposed algorithm - hardware mapping models can be used in optimal design of real - time signal processing system. they can also be used in automatic optimized compiler of vliw dsp
提出的演算法-硬體映射方法可以用於指導實時信號處理系統的最優設計，也可以用於研究vliwdsp的自動優化編譯系統。
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