data pipeline 中文意思是什麼
data pipeline
解釋
數據流水線-
The second chapter explains the character of mfl data by introducing the principle of pipeline mfl inspection and the structure of mfl detector, and then brings forward the diagnostically lossless compression request by combine discuss the analyzing method of inspection results
第二章通過對管道漏磁檢測原理和檢測器結構的介紹，說明漏磁檢測數據的特徵並結合檢測結果的分析方法提出對管道漏磁檢測數據的檢測無損壓縮要求。 -
Aiming at the study actuality of fan performance monitoring system and analysis of fan performance curve changes affected by inlet - box and the different fixed - angles of guide blades in the course of installation, a fan flow monitoring model based on rbfnn in whole flow zone was established in this thesis. in the model, the method of no throttle and fan performance curve were used as basis. and on the basis of that model, fan performance curves of 4 - 73no. 8d were approached with experimental data of different speed, different opening - angles of guide blade and different resistance of pipeline, the precision and the error law of model were studied
本文針對電站風機性能監測系統研究較少的現狀，在實驗的基礎上分析了現場加裝進氣箱和由於安裝造成的導流器葉片開度不一致對風機性能曲線的影響，並在此基礎上採用無節流方法測量流量，以風機調節性能曲線為依據，建立了基於徑向基函數（ rbf ）神經網路的風機流量全程監測模型；以實驗室4 - 73no . 8d離心風機為研究對象，探討了rbf神經網路差壓模型在變轉速、變導流器開度和變管網阻力等工況下的應用精度和誤差分佈規律；最後用visualc + +語言開發了風機性能在線監測系統。 -
There are five parts in powerpc603e ? microprocessor : integer execution unit, floating point unit ( fpu ), instruction ( data ) cache, bus interface unit and memory manage unit. the instructions are executed with pipeline way
Powerpc603e微處理器系統由定點執行單元、浮點單元、指令（數據） cache 、總線介面單元、存儲管理單元組成，以流水和超標量方式執行指令。 -
The risc mcu core is based on harvard architecture with 14 - bit instruction length and 8 - bit data length and two - level instruction pipeline the performance of the risc mcu has been improved by replacing micro - program with direct logic block
設計的riscmcu採用14位字長指令總線和8位字長數據總線分離的harvard結構和二級指令流水設計，並使用硬布線邏輯代替微程序控制，加快了微控制器的速度，提高了指令執行效率。 -
It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ), 5 - stage pipeline, hardware multiplier and divider, interrupt controller, 16 - bit i / o port and a flexible memory controller. new modules can easily be added using the on - chip amba ahb / apb buses. it has flexible peripheral interfaces, so can be used as an independent processor in the board - level application or as a core in the asic design
它遵照ieee - 1745 （ sparcv8 ）的結構，針對嵌入式應用具有以下特點：採用分離的指令和數據cache （哈佛結構） ，五級流水，硬體乘法器和除法器，中斷控制器， 16位的i / o埠和靈活的內存控制器，具有較強的異常處理功能，新模塊可以輕松的通過片上的ambaahb / apb總線添加。 -
After analyzing and comparing different partition rules, md32 pipeline architecture is finally defined, which meets the required instruction function, frequency and timing spec of md32. a complete set of creative design method for risc / dsp md32 micro - architecture is presented, such as parallel design, internal pipeline, central control, etc. thanks to the adoption of these design methodology, control path and data path are separated, circuit delay is reduced, and complex instruction operations are balanced among multiple pipeline stages
它們將若干復雜指令操作均勻分配在幾個流水節拍內完成，實現了任意窗口尋址等復雜指令操作，將整個處理器的數據通路與控制通路分離，減小了電路時延，從而滿足了risc dsp不同指令功能和系統時鐘頻率的要求，構成了統一的、緊密聯系的、協調的md32系統結構。 -
Chapter 4 explores the multi - level pipeline - controlled parallel mechanism and parallel performance of multi - sharc system. then the parallel data block - processing scheme for distributed multi - dsp ring network system is introduced in view of dsps " macro pipelines and operating pipelines
提出了在考慮到操作流水線和宏流水線的影響下，數據塊并行處理策略在基於環網結構的分散式多sharc系統中的新應用。 -
By using it, the section mapping drawings of multi - types & complex pipeline system can be automatically generated through the entity crossing operation. this method composes of the following three key steps. in the first, different graphic entities are identified from the complex pipelines drawing in terms of the layer information they owned, then the correspondent information is to be encapsulated to keep the spatial data completeness of the graphic symbols
該方法通過管線系統設計圖中的圖形實體的分層處理與信息封裝，首先實現了復雜管線實體的自動識別並確保了圖形實體具有對應管線實體對象的完備空間信息；在此基礎上，根據用戶給出的任意位置截切線，構造隱式描述的截切面並與隱式描述的管線實體進行求交運算；最後通過對求交結果的坐標變換，生成能夠直觀反映出多類型復雜管線系統空間分佈信息的截切面映射圖。 -
( 2 ) research the instruction launch strategy, controls correlation processing and data correlation processing of 32 - bit mips ’ s double - launching pipeline. obtained the design modes : static launch, optimized compile instruction, 1st pipeline jump and branch processing and double pipeline four channels front data path. ( 3 ) achievement designs by the platform xilinx ise 5. 2i, uses the verilog hardware description language to carry on the design description to the double - launching
（ 2 ）對基於32位mips架構雙發射流水線的指令發射策略、控制相關處理和數據相關處理等流水線結構的重要問題進行深入研究，並得出了靜態發射、優化編譯指令序、第一流水線無延遲分支處理和雙流水線四通道前向數據通路等一系列能夠與32位mips架構相匹配的雙發射流 -
Research on pipeline mfl data compression algorithm
管道漏磁檢測數據壓縮演算法的研究 -
After analyzing the defect and shortcoming of current pipeline check software, the domain - driven design method and uml are introduced to review the check rules, then the pipeline check knowledge rule base capable of customization and its reasoning engine are put forward, finally checking the all - sided investigation pipeline data and its vector data combining with gis intelligently is realized
摘要分析了當前地下管線數據檢查中的缺點與不足，引入領域驅動設計方法和uml來對檢查規則進行分析建模，提出建立可定製的管線檢查知識規則庫及其推理機，並結合gis來對管線數據進行智能化檢查。 -
Two crucial technologies in instantaneous negative pressure wave method are analyzed in this dissertation, then a means is presented which can eliminate the dynamic response time diversity between pressure sensors in the beginning and end of the pipeline, by adopting gps to unify the system time between data collecting systems in two ends
分析了負壓波泄漏定位方法的兩項關鍵技術，提出了消除首末、端壓力傳感器動態響應時間差的方法，採用gps來統一首末端數據採集系統的系統時間；使定位更加準確。 -
For insuring the robustness and high - efficiency of ett utility program, pipeline technology with logical condition of power builder and time - marker table created in data warehouse are adopted while designing and developing ett utility program
為了確保ett實用程序的健壯性和高效性以及數據倉庫中數據的一致性和完整性，在ett實用程序的設計開發過程中採用了powerbuilder具有邏輯限制條件的數據管道技術，並在數據倉庫中設置了時間標記表和數字標記表。 -
The system - controlled iir filter and fft were realized using fpga in this paper, and modified pipeline structure is adopted to greatly raise the running speed in the system - controlled iir filter. in the same time, it is used that the algorithm of n - point complex to compute 2n - point real data block in the radix - 2 fft. it is different to the normal method in the adoption of pipeline single dual ram for each stage
論文用fpga實現了系統的受控iir濾波器和fft部分，受控濾波器採用改進的流水線結構，運行速度得到了大幅度的提高，同時運用n點復數dft演算法來計算2n點實數數據，在fpga中實現了基2的1024點復數fft ，同一般的實現不同，採用了流水線式的每級單個雙口ram的方法，節省了ram的容量，經驗證，該設計符合濾波器系統的要求。 -
This dissertation concentrates on the difficult problems that the pipeline or pipe defects are not estimated or evaluated quantitatively, intelligently by mfl ( magnetic flux leakage ) inspection method. from the practical demand, theoretical analysis and experiments or testing, the mfl inspection technology of pipeline or pipe defects are explained, summarized in detail in the whole paper, at the same time, the relationship between the mfl field distribution, the mfl signal shape and the defect geometry or severity, the analysis of the mfl data and the compensation of influencing the relationship factors, signal feature extraction, intelligent recognition of defect parameters and so on are studied systematically
論文針對管道（鋼管）缺陷漏磁檢測定量化、智能化的難題，緊密結合檢測現場實際需要，通過理論分析和大量實驗，系統分析總結了管道（鋼管）缺陷漏磁智能檢測技術，並在缺陷漏磁場分佈以及缺陷漏磁信號與缺陷外形參數間的關系、缺陷漏磁信號分析、漏磁信號影響因素補償、缺陷漏磁場波形特徵提取和缺陷外形尺寸定量識別等方面進行了深入研究，主要成果和創新如下：引出磁偶極子模型近似分析常見缺陷漏磁場，針對磁偶極子模型的不足，將有限元方法應用到缺陷漏磁場分析，實現了常見管道樣本缺陷漏磁場的模擬。 -
The system sample data by ccd camera, process the data by dsp and harmonize the peripheral equipments by pc for sorting the impurity and displaying the cotton in the pipeline. the main algorithms of the system are sorting and coaching
該系統通過ccd攝像頭采樣，用dsp進行高速數據處理，通過工控機總體協調控制相應外圍設備剔除不符合標準的雜質並實時顯示管道中流動的棉花。 -
Design and implementation of heterogeneous database conversion system based on data pipeline
數據管道的異構數據庫轉換系統設計與實現 -
In the phase of data treats, the paper introduces a data pipeline technique into the arithmetic. the speedup ratio is 8. 89, largely increases the speed of compression
在數據處理階段，本論文引入了數據流水，獲得了8 . 89的加速比，極大地加快了數據壓縮的過程。 -
In system hardware design, data pipeline of the separation of reading and writing, which aims at data memory control - flow analysis in raid and reduces the resource ' s expanse of memory system, is established
在系統硬體設計中，針對數據在raid中的存儲控制流程，建立了讀寫分離的數據流水線，減少存儲系統的資源開銷。 -
System integration technique is used in the design of the system, and satisfactory effects result from the extensions of the function of the datawindow and the data pipeline witch fetch up the limitation of the powerbuilder in the creating chinese report and transferring data
在系統設計中，採用了系統集成技術，並通過擴展數據窗口和數據管道功能彌補了powerbuilder在創建中文報表和數據轉移上的不足，取得了令人滿意的效果。
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