flow chip 中文意思是什麼
flow chip
解釋
帶狀切屑-
This experiment focuses on the characteristic of green refrigerant r600a in a small parallel flow aluminum closed two - phase thermosiphon and measures all the quantity of injected mass and heat dissipation, the speed of air and the difference of temperature of the electronic element ( cpu simulate chip ) surface and environment
處理速度達到g數量級，功率消耗更達幾十瓦。如何解決cpu散熱問題，成為關注的焦點。本實驗首次研究了綠色環保工質r600a在一種鋁質重力熱管中的工作特性。 -
The research object of this thesis is a chip - array that is fixed on one of printed circuit boards ( pcb ), which are located in a forced air field ( forced convection ) in an electronic case ; and from the essential equations of airflow we can deduce the mathematical model of the turbulent flow ; then we can establish the finite element algorithm and apply the fe software to work out the equations of turbulent flow, finally we can use the software to display and analyse the field of flow and temperature
本文以處于強迫空氣對流流場中的某pcb板及其板上的電子元件陣列作為研究對象，推導了紊流流場的數學模型，並建立了相應的有限元求解格式，應用有限元法分析軟體對該系統的紊流流場和溫度場進行了模擬分析：解算出pcb板上各電子元件的溫度分佈；並提出了用於求解系統風道特性曲線的cfd方法。 -
Chapter 4 studies scheduling algorithm of the core node to implement on single adsp2191. the result shows that a single adsp2191 chip can ’ t satisfy the bhp processing delay request and parallel processing is inevitable. chapter 5 primarily studies the core node ’ s scheduling algorithm with many dsp parallel process. details of lauc - vf scheduling algorithm analysis data flow organization and mission distribution are argued. the results of software simulation and hardware debugging indicate that many dsp parallel processing is effective and coincident with the system ’ s demand
結果表明單片adsp2191晶元不能夠滿足核心節點對bhp的實時處理要求，必須多dsp并行處理。第五章研究了核心節點調度演算法的多dsp并行處理。對多bhp批調度演算法的實現進行分析，探討了多bhp處理任務的的劃分和分配方案;多dsp間數據通信和傳輸的dma實現;最後對多處理器并行的處理時間進行模擬測試分析。 -
In this paper, the method of digital evolvable hardware is studied based on the dynamical reconfiguration of field programmable gate array ( fpga ). in the paper, firstly, the basic conception and theory of ehw are roundly introduced and the structure characters of ehw chip are analyzed. secondly, the thought of standard evolutionary algorithm is discussed and the flow of improved evolutionary algorithms is analyzed
本文首先較全面地介紹了硬體演化技術的基本概念和原理，分析了演化硬體晶元的結構特點；其次，討論了標準演化演算法的思想並對改進型演化演算法的流程進行了分析；然後著重分析了演化硬體實現中的關鍵技術，對其實現方案進行了深入的研究，文中分別採用外部演化和內部演化兩種方式對不同的應用電路進行了演化。 -
It is shown that our presented circuit model was correct. secondly, on the basis of analghng the fhahon of pcd reader of contactless ic card, the softwar flow chat of cothetless ic card controller based on chip - thoing algorithin and the hardwar circuit and anenna of the reader were designed
第二，在分析非接觸ic卡讀寫器功能的基礎上，設計基於時間片演算法的非接觸ic卡控制器軟體流程圖和讀寫器硬體電路以及非接觸ic卡讀卡器的天線。 -
With turning the scale of asic ( appl ication specified integrated circuits ) to s0c ( system on chip ), which conunon1y is composed of mcu, specified function ip cores, memory, periphery interface etc, the ip reuse techno1ogy is very important in s0c design flow, which can realize the constructions of different levels components. the approach of configurable system, method and design f1ow for udsm ( u1tra deep sub micron ) asic, logic system design using hdl 1anguage, coding style, static and dynamic verification strategy are a1so presented in chapter 2. in chapter 3 we study the vlsi - - dsp architecture design, dense computation and high speed high performance digital signal processing unit structure, which includes high speed mac components and distributed arithmetic unit
在工程設計方法及結構化設計和高層次綜合的研究中，介紹了在深亞微米工藝條件使用的方法和asic設計流程，討論了高層次綜合的核心如何從描述推出電路構成的設計思路，針對不同目標的設計技巧討論了採用hdl語言進行邏輯系統設計的方法，給出了用vhdl語言進行代碼設計時的規范和風格，在面向soc的驗證策略討論了動態和靜態的驗證技術，提出了進行單獨模塊驗證、晶元的全功能驗證和系統軟硬體協同驗證的整體策略。 -
In the hardware designing, the system uses the lower electronic - consuming pic16f877 single - chip computer, combined with micro - work consuming design of other parts. we also used a real time clock, which is combined with the flow of liquid, so we can make inquiry the flow data conveniently
在系統硬體設計中，採用了耗電少的pic16f877單片機，各部分採用微功耗設計，並引入日歷時鐘，將日歷時鐘和流體的流量結合在一起，便於流量數據的查詢。 -
The driver has the quiescent current under 1 a and also has soft - start circuitry to limit inrush current flow at power up. the chip can be operated normally in the temperature range of - 40 to 85 according to the simulation results. the brightness of the white leds can be controlled by using a dc voltage or a pwm signal applied to the pin with a few external components added
系統採用0 . 5 mcmos工藝;輸入電壓范圍為2 . 7v到5 . 5v ;在關閉狀態下消耗電流小於1 a ;具有軟啟動功能，可減小啟動過程中的浪涌電流;具有短路及過熱保護功能，工作溫度范圍為- 40至85 ; led亮度控制可以通過外加dc或pwm電壓信號和很少的外部元件實現。 -
The five main sections of this thesis are as follows : 1 ) component parts and working flow of intelligent community 2 ) hit communicating protocol 3 ) technical points of hardware design single chip micro - controller touch screen rf data transmitting identification confirmation flash memory 4 ) software design under avr studio3. 53 ide 5 ) method and result of system test
論文包括以下幾個主要部分： 1 ）智能小區系統組成及系統運行流程2 ） hit通信協議3 ） hit - 5終端硬體電路設計單片機技術觸摸屏輸入技術無線數據收發技術身份識別技術flash存儲技術4 ） avrstudio3 . 53程序設計5 ）系統測試方法及調試結果 -
A h. 263 real - time video coding system based on dsp chip is then designed which follows the develop flow of a dsp system
然後按照dsp系統的開發流程，設計開發了一個基於dsp晶元的h . 263實時視頻壓縮編解碼系統。 -
The tramsission rate exceed to the range of isa bus, moreovcr the pci bus can be competent for the rate request. the card makes use of the total line in pcicontroller, the slice of fifo, fpga and super - speed a data correspondence chip, which can solve the transmission stream and total line in pci connecting problem. and realizes the mpeg - 2 deliver to flow with establish outside delivers
此速率超過了isa總線所能支持的傳送速率，而pci總線能夠勝任這一要求，由此確定節目傳輸流發送卡採用pci總線。此卡利用pci總線控制器、 fifo晶元、 fpga晶元、高速串列數據通信發送晶元，解決傳輸流與pci總線之間的介面問題，實現了mpeg - 2傳輸流與外設的高速數據傳輸。 -
Chapter 5 explains the signal flow in the if module and the theory in fm modulating and demodulating, and shows a few algorithms of the fir filter design and the spectrum comparing realized by the dsp chip, produces their result in the matlab simulator and real circuit debugging
第五章介紹了數字中頻模塊的信號流程、 fm信號調制與解調理論，介紹了用dsp晶元實現的fir濾波，頻譜比較等演算法的matlab模擬與實際電路的調試結果。 -
It presents the verification strategy used in the whole eda design flow of the chip. the simulation on module level ( inc. post - layout ) uses the software event - driven simulator, the simulation of the associated modules or whole system uses cycle - based simulator and hardware emulator, for the gate - level netlist produced by using top - down design flow, the sta tool can analyze the static timing, and more formal verification is used to ensure the correct function
本章還提出了系統在整個eda設計流程中的設計驗證策略方法：模塊級的模擬（包括布線后的模擬）全部採用事件驅動式的軟體模擬工具來驗證，各大模塊的聯合模擬及整個晶元的功能驗證（寄存器傳輸級與門級）使用基於周期的模擬工具和硬體模擬器；對于採用top - down的設計方法得到的門級網表使用專門的靜態時序分析工具來進行時序分析以及採用形式驗證來保證正確的功能。 -
However there are no numerical computations about continuous - flow pcr chip. so the microfliudic velosity and temperature distribution in direct microchannel, curve microchannel and widing microchannel with 100 m width and 50 m depth are computated using fluent software
Pcr微流控晶元的制備則是採用本文提出的新方法，在pmma材料上制備出橫截面為矩形、底面光滑、逶迤型的微通道。 -
Concretely, on the basis of describing the communication specification of arinc 429 with enhanced parallel port ( epp ), the standard and the module application of dsp and cpld, the thesis has proposed the design of the arinc 429 technology based on dsp system. at first, the function and the application of each module of the system and the operation principle of high - performance cmos bus interface circuit hs - 3282 chip which forms the main body of the data diversion of the interface module are introduced. secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc. and then the design philosophy and flow charts of the software are fully discussed, such as the basic requirement of software, the design and realization of the function
本文在簡單的論述了pc並口協議（ epp ）與dsp之間的通信方法、 cpld模塊邏輯控制應用和arinc429的通訊規范的基礎上，給出了基於dsp的arinc429通訊介面的設計方案:對通訊板中各模塊的功能和應用以及構成數據轉換主體的總線介面晶元hs - 3282的工作原理做了說明;介紹了本設計所用的dsp和cpld的功能概況;詳細敘述了通訊板介面模塊的硬體結構設計，其中，對數據緩沖電路、數據傳輸速率選擇電路、邏輯控制電路等各關鍵點做了重點介紹;具體闡述了軟體設計思想及流程圖，包括軟體的基本要求和功能的設計與實現;接著從埠譯碼單元、 i / o通道、電平轉換電路等方面進行了介面模塊的軟、硬體調試;最後，給出了測試結果，對研製工作做了總結，對本設計的優缺點各做了評述。 -
With the in - built drip irrigation belt and thin wall chip irrigation belt taken as examples, the flow rate distribution and hydraulic losses of drippers along capillary tubes at different inlet pressures were measured under the conditions of horizontal slope and slope gradients of 0. 5 % and 1 %, then the uniformity of capillary tubes was calculated at different slope gradients and pressures in consideration of the manufacture deviation of drippers
摘要以內鑲式滴灌帶和薄壁滴灌帶為研究對象，測定了平坡、 0 . 5 %坡度和1 %坡度時，不同入口壓力下滴頭沿毛管的流量分佈和水力損失，並結合滴頭的製造偏差，計算得出不同坡度和壓力條件下滴灌毛管的均勻度。 -
The intelligent measuring meter configured by scm ( single chip microprocessor ) system is to sample and process the voltage signal output by the sensor, calculate and display the value of instant flow and total flow. furthermore, it can show the chargement according to the price of water set through the keyboard
以單片機應用系統為核心的智能測量儀表負責對傳感器的電壓輸出信號進行採集和處理，計算和顯示出被測水流的瞬時流量和累積流量，並可根據所設定的單價實現水費的自動計價。 -
Regard how to structure the control system of sensorless bldcm with dsp - tms320f240 as the centre in this paper, the detailed argumentation course of the motor startup, bemf terminal voltage measurement and control strategy is given out, give and pay concrete details for the software and hardware realization and experimental result. in order to treat the bldcm control system with dsp clearly, the full paper divides into six chapters altogether : chapter one, introduceing the development course, the structure characteristic and operation principle, etc. of bldcm in the introduction ; chapter two, directed against the startup issue of bldcm, the chapter give and publish the rotor measure pulse orients technology for motor startup in detail ; chapter three, proceed with mathematics model of the bldcm, expounding the control schemes ; chapter four, two important devices introducing : dsp ( 240 tms320f ) and power invertor control chip ( ir2131s ) ; chapter five, give and publish the detail of hardwares of control system ; chapter six, by ccs ide of ti, realize the control schemes in the front chapters with software, offere the procedure flow chart of main subroutine and some key place of programming, the experiment result in addition
全文共分六章：第一章、緒論中介紹了bldcm的發展歷程、電機本身的結構特點和工作原理等；第二章、針對五位置傳感器bldcm的起動問題，文中詳細給出了檢測脈沖轉子定位起動技術；第三章、從電機的數學模型入手，詳細論述了反電動勢端電壓法和系統的控制策略；第四章、介紹了硬體實現中的兩個重要器件： dsp （ tms320f240 ）和功率管逆變器控制晶元（ ir2131s ） ；第五章、詳細給出了控制系統的硬體實現細節；第六章、利用ti提供的ccs集成開發環境，將前面章節的控制方案用軟體加以實現，給出了主要部分的程序流程圖和一些編程要點以及實驗結果。 -
In the first chapter, the study background. direction and main content of this paper are presented. in the second chapter, the character and application of motorola dsp chip, the system design of this power supply and a small - signal model of fbps converter are introduced. in the third chapter, the operation of fbps converter is analyzed in detail and the design of hardware is given. in the fourth chapter particular software design and program flow are given. the result and analyse of experiment are given in this chapter too. in the last chapter, summarize of full paper and works followed are given
本文第一章介紹了課題的研究背景、方向和主要內容；第二章簡單闡述了dsp晶元的特點及其在電力電子領域的應用，介紹了motoroladsp晶元dsp56f8323的性能特點；提出基於motoroladsp控制的移相全橋軟開關dc dc變換器的硬軟體系統設計方案；最後建立移相全橋變換器的小信號模型進行系統分析。第三章分析了系統硬體部分即軟開關全橋變換器的工作原理和工作模式；給出了詳細的硬體設計。 -
The main characteristic of the biosensor was to introduce the air as the carrier flow instead of the common solution carrier for the first time. the uric acid was sensed by the cl reaction between hydrogen peroxide produced from the enzymatic reactor and luminol under the catalysis of hrp in the microreactor. the present biosensor chip was successfully applied to the measurements of uric acid in serum
第四章中，研究了魯米諾鐵氰化鉀edta甲基多巴這一化學發光反應特點，結果表明魯米諾鐵氰化鉀甲基多巴在堿性條件下能產生強烈的化學發光，該反應為快發光過程，當一定量的edta存在下，該發光轉變成一慢發光過程。
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