instruction scheduling 中文意思是什麼
instruction scheduling
解釋
命令計劃- instruction : n. 1. 教育，教導。2. 教訓，教誨。3. 〈 pl. 〉 指令，訓令，指示，細目。
- scheduling : 編排；調度
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Instruction decode, scheduling, dispatch, and retirement functionality is contained within this region
指令解碼，分時，分佈和退回功能就在此區。 -
Based on these two factors mentioned above and the difficulty to implement in c compiler, this paper proposed a method of modifying operand type by inserting instruction lw or sw at assemble level as well as instruction scheduling. therefore, this can generate effective parallel instructions and correspondingly improve the performance and density of object code
本文在分析了上述兩個限制并行指令生成的主要因素以及很難在編譯器中實現并行指令生成的基礎上，提出了在匯編級檢查指令的操作數類型，通過插入lw或sw指令來改變操作數類型及指令調度的方法，能夠有效的生成并行指令，提高了代碼運行效率和代碼密度。 -
This thesis makes use of instruction split, delay - slot scheduling and peephole optimization in porting. the new cross - compiler system, zltcg, not only supports the new target but also absorbs the old system ' s advantages on code optimization and portability. at first, this thesis describes the developing history and theories of compiler, especially on its architecture, bootstrapping and porting
本文根據新目標機的特點，利用了指令拆分，延時槽調度，窺孔優化等技術，既實現了對新目標機的支持，又吸收了原有系統高度優化和可移植的優點。 -
The functions of mes at steel companies are introduced, including management of manufacturing standard, scheduling production plan, creation and delivery of production instruction, record of production performance, management of material tracking, judgement of quality design, monitoring of working procedures and equipment operations
介紹了鋼鐵企業製造執行系統的功能，包括製造標準的管理、作業計劃編制、生產指令生成及下達、生產實績收集、物料跟蹤管理、質量設計判定、工序成本的實時監視和生產設備運行狀況監視。 -
Superscalar risc microprocessor is the further development of reduced instruction set computer, it improve the instruction - level - parallism by means of adding parallel pipelining function units and dynamic on - chip scheduling. this thesis anslysises the architecture and the diversified techniques of superscalar computer
超標量risc微處理器是精簡指令結構（ risc ）的進一步發展，它通過增加并行流水執行單元並結合片上硬體動態調度來提高指令并行度。 -
Optimization when compiling six approaches are proposed : constant embedding, constant propagation, duplication propagation, flag update elimination, conditional instruction merge and instruction scheduling
編譯期優化提出六種編譯期優化的手段:只讀常量內嵌，常量傳播，復制傳播，消除無用標志位更新，條件語句合併和指令重排。 -
After the designing was finished, the instruction system and operating scheduling were given
設計完成後，給出了單片機的各種操作時序以及指令系統。 -
This paper analyze the architecture of amex86 microprocessor, including the analyzer of instruction system, addressing mode, scheduling and clock of instruction, the integration and validation of amex86 architecture. this paper mainly discusses the design and realization of data path and instruction decoder in detail
本論文將對amex86體系結構的微處理器進行體系結構分析，包括指令系統的分析、尋址方式的分析，指令時序以及指令時鐘拍數的分析和amex86系統的集成及驗證等。
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